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| author | Simon Glass <sjg@chromium.org> | 2015-07-27 21:47:17 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-08-05 14:42:41 (GMT) |
| commit | 5f48d798eb151f50d79b93913b59190a679ee9b5 (patch) | |
| tree | 691bb8c5bbd71ccf9cd1c16536a54ecafe96ccac | |
| parent | f134ed7df1167c6b2f0a62e3765abedced3feacc (diff) | |
| download | u-boot-5f48d798eb151f50d79b93913b59190a679ee9b5.tar.xz | |
pci: Add a constant for an invalid interrupt
Rather than using 0xff in the code, add a constant.
Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
| -rw-r--r-- | drivers/pci/pci.c | 3 | ||||
| -rw-r--r-- | include/pci.h | 2 |
2 files changed, 4 insertions, 1 deletions
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index df50b48..645ecd4 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -269,7 +269,8 @@ int pci_hose_config_device(struct pci_controller *hose, /* Disable interrupt line, if device says it wants to use interrupts */ pci_hose_read_config_byte(hose, dev, PCI_INTERRUPT_PIN, &pin); if (pin != 0) { - pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, 0xff); + pci_hose_write_config_byte(hose, dev, PCI_INTERRUPT_LINE, + PCI_INTERRUPT_LINE_DISABLE); } pci_hose_read_config_dword(hose, dev, PCI_COMMAND, &old_command); diff --git a/include/pci.h b/include/pci.h index dce159f..628ede0 100644 --- a/include/pci.h +++ b/include/pci.h @@ -231,6 +231,8 @@ #define PCI_MIN_GNT 0x3e /* 8 bits */ #define PCI_MAX_LAT 0x3f /* 8 bits */ +#define PCI_INTERRUPT_LINE_DISABLE 0xff + /* Header type 1 (PCI-to-PCI bridges) */ #define PCI_PRIMARY_BUS 0x18 /* Primary bus number */ #define PCI_SECONDARY_BUS 0x19 /* Secondary bus number */ |