diff options
author | Tom Rini <trini@konsulko.com> | 2016-08-03 00:45:24 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-08-03 00:45:24 (GMT) |
commit | ad6a303c578b0087749510d20c1c46ae13f20367 (patch) | |
tree | df814f33a90a3dbd6a39aa8dad4fa8628a9eea6f | |
parent | 7351bf2b5b35819104d7c84ba8fd7d72eea544ee (diff) | |
parent | ab01ef5fa617444fd95543ee04ea53ccda273269 (diff) | |
download | u-boot-ad6a303c578b0087749510d20c1c46ae13f20367.tar.xz |
Merge git://git.denx.de/u-boot-fsl-qoriq
-rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/ppa.c | 2 | ||||
-rw-r--r-- | arch/arm/include/asm/psci.h | 3 | ||||
-rw-r--r-- | arch/arm/lib/psci-dt.c | 80 | ||||
-rw-r--r-- | arch/powerpc/include/asm/immap_85xx.h | 2 | ||||
-rw-r--r-- | board/freescale/b4860qds/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/bsc9132qds/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/corenet_ds/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/ls1021atwr/MAINTAINERS | 4 | ||||
-rw-r--r-- | board/freescale/ls1043ardb/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/t1040qds/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/t104xrdb/MAINTAINERS | 6 | ||||
-rw-r--r-- | board/freescale/t208xqds/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/t208xrdb/MAINTAINERS | 2 | ||||
-rw-r--r-- | board/freescale/t4qds/MAINTAINERS | 2 | ||||
-rw-r--r-- | cmd/blob.c | 2 | ||||
-rw-r--r-- | drivers/crypto/fsl/fsl_blob.c | 13 | ||||
-rw-r--r-- | drivers/ddr/fsl/ctrl_regs.c | 2 | ||||
-rw-r--r-- | drivers/spi/fsl_qspi.c | 4 | ||||
-rw-r--r-- | include/configs/ls1012aqds.h | 4 | ||||
-rw-r--r-- | include/configs/ls1043a_common.h | 2 | ||||
-rw-r--r-- | include/configs/ls1043ardb.h | 4 | ||||
-rw-r--r-- | include/fsl_mmdc.h | 4 |
22 files changed, 82 insertions, 66 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c index 541b251..f54ac3f 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/ppa.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/ppa.c @@ -24,7 +24,7 @@ int ppa_init(void) u32 *boot_loc_ptr_l, *boot_loc_ptr_h; int ret; -#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR +#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP ppa_fit_addr = (void *)CONFIG_SYS_LS_PPA_FW_ADDR; #else #error "No CONFIG_SYS_LS_PPA_FW_IN_xxx defined" diff --git a/arch/arm/include/asm/psci.h b/arch/arm/include/asm/psci.h index 8aefaa7..5b8ce4d 100644 --- a/arch/arm/include/asm/psci.h +++ b/arch/arm/include/asm/psci.h @@ -18,6 +18,9 @@ #ifndef __ARM_PSCI_H__ #define __ARM_PSCI_H__ +#define ARM_PSCI_VER_1_0 (0x00010000) +#define ARM_PSCI_VER_0_2 (0x00000002) + /* PSCI 0.1 interface */ #define ARM_PSCI_FN_BASE 0x95c1ba5e #define ARM_PSCI_FN(n) (ARM_PSCI_FN_BASE + (n)) diff --git a/arch/arm/lib/psci-dt.c b/arch/arm/lib/psci-dt.c index 8dc31d4..baf6d70 100644 --- a/arch/arm/lib/psci-dt.c +++ b/arch/arm/lib/psci-dt.c @@ -19,7 +19,6 @@ int fdt_psci(void *fdt) #if defined(CONFIG_ARMV8_PSCI) || defined(CONFIG_ARMV7_PSCI) int nodeoff; unsigned int psci_ver = 0; - char *psci_compt; int tmp; nodeoff = fdt_path_offset(fdt, "/cpus"); @@ -51,27 +50,10 @@ int fdt_psci(void *fdt) fdt_setprop_string(fdt, tmp, "enable-method", "psci"); } - /* - * The PSCI node might be called "/psci" or might be called something - * else but contain either of the compatible strings - * "arm,psci"/"arm,psci-0.2" - */ nodeoff = fdt_path_offset(fdt, "/psci"); if (nodeoff >= 0) goto init_psci_node; - nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci"); - if (nodeoff >= 0) - goto init_psci_node; - - nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-0.2"); - if (nodeoff >= 0) - goto init_psci_node; - - nodeoff = fdt_node_offset_by_compatible(fdt, -1, "arm,psci-1.0"); - if (nodeoff >= 0) - goto init_psci_node; - nodeoff = fdt_path_offset(fdt, "/"); if (nodeoff < 0) return nodeoff; @@ -83,41 +65,53 @@ int fdt_psci(void *fdt) init_psci_node: #ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT psci_ver = sec_firmware_support_psci_version(); +#elif defined(CONFIG_ARMV7_PSCI_1_0) + psci_ver = ARM_PSCI_VER_1_0; #endif switch (psci_ver) { - case 0x00010000: - psci_compt = "arm,psci-1.0"; - break; - case 0x00000002: - psci_compt = "arm,psci-0.2"; - break; + case ARM_PSCI_VER_1_0: + tmp = fdt_setprop_string(fdt, nodeoff, + "compatible", "arm,psci-1.0"); + if (tmp) + return tmp; + case ARM_PSCI_VER_0_2: + tmp = fdt_appendprop_string(fdt, nodeoff, + "compatible", "arm,psci-0.2"); + if (tmp) + return tmp; default: - psci_compt = "arm,psci"; + /* + * The Secure firmware framework isn't able to support PSCI version 0.1. + */ +#ifndef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT + tmp = fdt_appendprop_string(fdt, nodeoff, + "compatible", "arm,psci"); + if (tmp) + return tmp; + tmp = fdt_setprop_u32(fdt, nodeoff, "cpu_suspend", + ARM_PSCI_FN_CPU_SUSPEND); + if (tmp) + return tmp; + tmp = fdt_setprop_u32(fdt, nodeoff, "cpu_off", + ARM_PSCI_FN_CPU_OFF); + if (tmp) + return tmp; + tmp = fdt_setprop_u32(fdt, nodeoff, "cpu_on", + ARM_PSCI_FN_CPU_ON); + if (tmp) + return tmp; + tmp = fdt_setprop_u32(fdt, nodeoff, "migrate", + ARM_PSCI_FN_MIGRATE); + if (tmp) + return tmp; +#endif break; } - tmp = fdt_setprop_string(fdt, nodeoff, "compatible", psci_compt); - if (tmp) - return tmp; tmp = fdt_setprop_string(fdt, nodeoff, "method", "smc"); if (tmp) return tmp; -#ifdef CONFIG_ARMV7_PSCI - tmp = fdt_setprop_u32(fdt, nodeoff, "cpu_suspend", - ARM_PSCI_FN_CPU_SUSPEND); - if (tmp) - return tmp; - tmp = fdt_setprop_u32(fdt, nodeoff, "cpu_off", ARM_PSCI_FN_CPU_OFF); - if (tmp) - return tmp; - tmp = fdt_setprop_u32(fdt, nodeoff, "cpu_on", ARM_PSCI_FN_CPU_ON); - if (tmp) - return tmp; - tmp = fdt_setprop_u32(fdt, nodeoff, "migrate", ARM_PSCI_FN_MIGRATE); - if (tmp) - return tmp; -#endif #endif return 0; } diff --git a/arch/powerpc/include/asm/immap_85xx.h b/arch/powerpc/include/asm/immap_85xx.h index c045a24..7a878be 100644 --- a/arch/powerpc/include/asm/immap_85xx.h +++ b/arch/powerpc/include/asm/immap_85xx.h @@ -1579,7 +1579,7 @@ typedef struct cpc_corenet { #define CPC_HDBCR0_CDQ_SPEC_DIS 0x08000000 #define CPC_HDBCR0_TAG_ECC_SCRUB_DIS 0x01000000 #define CPC_HDBCR0_DATA_ECC_SCRUB_DIS 0x00400000 -#define CPC_HDBCR0_SPLRU_LEVEL_EN 0x003c0000 +#define CPC_HDBCR0_SPLRU_LEVEL_EN 0x001e0000 #endif /* CONFIG_SYS_FSL_CPC */ /* Global Utilities Block */ diff --git a/board/freescale/b4860qds/MAINTAINERS b/board/freescale/b4860qds/MAINTAINERS index ac02bb7..97304c5 100644 --- a/board/freescale/b4860qds/MAINTAINERS +++ b/board/freescale/b4860qds/MAINTAINERS @@ -12,6 +12,6 @@ F: configs/B4860QDS_SPIFLASH_defconfig F: configs/B4860QDS_SRIO_PCIE_BOOT_defconfig B4860QDS_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/B4860QDS_SECURE_BOOT_defconfig diff --git a/board/freescale/bsc9132qds/MAINTAINERS b/board/freescale/bsc9132qds/MAINTAINERS index 3de62d3..c58fc50 100644 --- a/board/freescale/bsc9132qds/MAINTAINERS +++ b/board/freescale/bsc9132qds/MAINTAINERS @@ -13,7 +13,7 @@ F: configs/BSC9132QDS_SPIFLASH_DDRCLK100_defconfig F: configs/BSC9132QDS_SPIFLASH_DDRCLK133_defconfig BSC9132QDS_NAND_DDRCLK100_SECURE BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/BSC9132QDS_NAND_DDRCLK100_SECURE_defconfig F: configs/BSC9132QDS_NAND_DDRCLK133_SECURE_defconfig diff --git a/board/freescale/corenet_ds/MAINTAINERS b/board/freescale/corenet_ds/MAINTAINERS index 73b0553..708e812 100644 --- a/board/freescale/corenet_ds/MAINTAINERS +++ b/board/freescale/corenet_ds/MAINTAINERS @@ -30,7 +30,7 @@ F: configs/P5040DS_SPIFLASH_defconfig F: configs/P5040DS_SECURE_BOOT_defconfig CORENET_DS_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/P3041DS_NAND_SECURE_BOOT_defconfig F: configs/P5020DS_NAND_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1021atwr/MAINTAINERS b/board/freescale/ls1021atwr/MAINTAINERS index b997bb0..06d888f 100644 --- a/board/freescale/ls1021atwr/MAINTAINERS +++ b/board/freescale/ls1021atwr/MAINTAINERS @@ -9,3 +9,7 @@ F: configs/ls1021atwr_nor_lpuart_defconfig F: configs/ls1021atwr_sdcard_ifc_defconfig F: configs/ls1021atwr_sdcard_qspi_defconfig F: configs/ls1021atwr_qspi_defconfig + +M: Sumit Garg <sumit.garg@nxp.com> +S: Maintained +F: configs/ls1021atwr_sdcard_ifc_SECURE_BOOT_defconfig diff --git a/board/freescale/ls1043ardb/MAINTAINERS b/board/freescale/ls1043ardb/MAINTAINERS index 84ffb63..0503a3f 100644 --- a/board/freescale/ls1043ardb/MAINTAINERS +++ b/board/freescale/ls1043ardb/MAINTAINERS @@ -9,6 +9,6 @@ F: configs/ls1043ardb_nand_defconfig F: configs/ls1043ardb_sdcard_defconfig LS1043A_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/ls1043ardb_SECURE_BOOT_defconfig diff --git a/board/freescale/t1040qds/MAINTAINERS b/board/freescale/t1040qds/MAINTAINERS index 640538f..fb3565a 100644 --- a/board/freescale/t1040qds/MAINTAINERS +++ b/board/freescale/t1040qds/MAINTAINERS @@ -7,6 +7,6 @@ F: configs/T1040QDS_defconfig F: configs/T1040QDS_DDR4_defconfig T1040QDS_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/T1040QDS_SECURE_BOOT_defconfig diff --git a/board/freescale/t104xrdb/MAINTAINERS b/board/freescale/t104xrdb/MAINTAINERS index 7597800..0578989 100644 --- a/board/freescale/t104xrdb/MAINTAINERS +++ b/board/freescale/t104xrdb/MAINTAINERS @@ -26,9 +26,13 @@ F: configs/T1042D4RDB_SDCARD_defconfig F: configs/T1042RDB_PI_SDCARD_defconfig T1040RDB_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/T1040RDB_SECURE_BOOT_defconfig F: configs/T1040D4RDB_SECURE_BOOT_defconfig F: configs/T1042RDB_SECURE_BOOT_defconfig F: configs/T1042D4RDB_SECURE_BOOT_defconfig + +M: Sumit Garg <sumit.garg@nxp.com> +S: Maintained +F: configs/T1042RDB_PI_NAND_SECURE_BOOT_defconfig diff --git a/board/freescale/t208xqds/MAINTAINERS b/board/freescale/t208xqds/MAINTAINERS index d747de3..790b009 100644 --- a/board/freescale/t208xqds/MAINTAINERS +++ b/board/freescale/t208xqds/MAINTAINERS @@ -15,6 +15,6 @@ F: configs/T2081QDS_SPIFLASH_defconfig F: configs/T2081QDS_SRIO_PCIE_BOOT_defconfig T2080QDS_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/T2080QDS_SECURE_BOOT_defconfig diff --git a/board/freescale/t208xrdb/MAINTAINERS b/board/freescale/t208xrdb/MAINTAINERS index ccbfbab..f894f77 100644 --- a/board/freescale/t208xrdb/MAINTAINERS +++ b/board/freescale/t208xrdb/MAINTAINERS @@ -10,6 +10,6 @@ F: configs/T2080RDB_SPIFLASH_defconfig F: configs/T2080RDB_SRIO_PCIE_BOOT_defconfig T2080RDB_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/T2080RDB_SECURE_BOOT_defconfig diff --git a/board/freescale/t4qds/MAINTAINERS b/board/freescale/t4qds/MAINTAINERS index b159113..b288571 100644 --- a/board/freescale/t4qds/MAINTAINERS +++ b/board/freescale/t4qds/MAINTAINERS @@ -12,7 +12,7 @@ F: configs/T4240QDS_SDCARD_defconfig F: configs/T4240QDS_SRIO_PCIE_BOOT_defconfig T4160QDS_SECURE_BOOT BOARD -M: Aneesh Bansal <aneesh.bansal@freescale.com> +M: Ruchika Gupta <ruchika.gupta@nxp.com> S: Maintained F: configs/T4160QDS_SECURE_BOOT_defconfig F: configs/T4240QDS_SECURE_BOOT_defconfig @@ -54,7 +54,7 @@ __weak int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) */ static int do_blob(cmd_tbl_t *cmdtp, int flag, int argc, char *const argv[]) { - uint32_t key_addr, src_addr, dst_addr, len; + ulong key_addr, src_addr, dst_addr, len; uint8_t *km_ptr, *src_ptr, *dst_ptr; int enc, ret = 0; diff --git a/drivers/crypto/fsl/fsl_blob.c b/drivers/crypto/fsl/fsl_blob.c index 8b25921..d24b8fc 100644 --- a/drivers/crypto/fsl/fsl_blob.c +++ b/drivers/crypto/fsl/fsl_blob.c @@ -18,7 +18,7 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) int ret, i = 0; u32 *desc; - printf("\nDecapsulating data to form blob\n"); + printf("\nDecapsulating blob to get data\n"); desc = malloc(sizeof(int) * MAX_CAAM_DESCSIZE); if (!desc) { debug("Not enough memory for descriptor allocation\n"); @@ -27,12 +27,15 @@ int blob_decap(u8 *key_mod, u8 *src, u8 *dst, u32 len) inline_cnstr_jobdesc_blob_decap(desc, key_mod, src, dst, len); + debug("Descriptor dump:\n"); for (i = 0; i < 14; i++) - printf("%x\n", *(desc + i)); + debug("Word[%d]: %08x\n", i, *(desc + i)); ret = run_descriptor_jr(desc); if (ret) printf("Error in Decapsulation %d\n", ret); + else + printf("Decapsulation Success\n"); free(desc); return ret; @@ -51,12 +54,16 @@ int blob_encap(u8 *key_mod, u8 *src, u8 *dst, u32 len) } inline_cnstr_jobdesc_blob_encap(desc, key_mod, src, dst, len); + + debug("Descriptor dump:\n"); for (i = 0; i < 14; i++) - printf("%x\n", *(desc + i)); + debug("Word[%d]: %08x\n", i, *(desc + i)); ret = run_descriptor_jr(desc); if (ret) printf("Error in Encapsulation %d\n", ret); + else + printf("Encapsulation Success\n"); free(desc); return ret; diff --git a/drivers/ddr/fsl/ctrl_regs.c b/drivers/ddr/fsl/ctrl_regs.c index abd576b..24fd366 100644 --- a/drivers/ddr/fsl/ctrl_regs.c +++ b/drivers/ddr/fsl/ctrl_regs.c @@ -709,7 +709,7 @@ static void set_timing_cfg_2(const unsigned int ctrl_num, | ((add_lat_mclk & 0xf) << 28) | ((cpo & 0x1f) << 23) | ((wr_lat & 0xf) << 19) - | ((wr_lat & 0x10) << 18) + | (((wr_lat & 0x10) >> 4) << 18) | ((rd_to_pre & RD_TO_PRE_MASK) << RD_TO_PRE_SHIFT) | ((wr_data_delay & WR_DATA_DELAY_MASK) << WR_DATA_DELAY_SHIFT) | ((cke_pls & 0x7) << 6) diff --git a/drivers/spi/fsl_qspi.c b/drivers/spi/fsl_qspi.c index 75cbab2..2144fca 100644 --- a/drivers/spi/fsl_qspi.c +++ b/drivers/spi/fsl_qspi.c @@ -386,6 +386,7 @@ static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len) { struct fsl_qspi_regs *regs = priv->regs; u32 mcr_reg; + void *rx_addr = NULL; mcr_reg = qspi_read32(priv->flags, ®s->mcr); @@ -393,8 +394,9 @@ static inline void qspi_ahb_read(struct fsl_qspi_priv *priv, u8 *rxbuf, int len) QSPI_MCR_CLR_RXF_MASK | QSPI_MCR_CLR_TXF_MASK | QSPI_MCR_RESERVED_MASK | QSPI_MCR_END_CFD_LE); + rx_addr = (void *)(uintptr_t)(priv->cur_amba_base + priv->sf_addr); /* Read out the data directly from the AHB buffer. */ - memcpy(rxbuf, (u8 *)(priv->cur_amba_base + priv->sf_addr), len); + memcpy(rxbuf, rx_addr, len); qspi_write32(priv->flags, ®s->mcr, mcr_reg); } diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h index fcf402c..6e31ca0 100644 --- a/include/configs/ls1012aqds.h +++ b/include/configs/ls1012aqds.h @@ -28,11 +28,11 @@ #define CONFIG_SYS_I2C_FPGA_ADDR 0x66 #define QIXIS_LBMAP_BRDCFG_REG 0x04 #define QIXIS_LBMAP_SWITCH 6 -#define QIXIS_LBMAP_MASK 0xf7 +#define QIXIS_LBMAP_MASK 0x08 #define QIXIS_LBMAP_SHIFT 0 #define QIXIS_LBMAP_DFLTBANK 0x00 #define QIXIS_LBMAP_ALTBANK 0x08 -#define QIXIS_RST_CTL_RESET 0x41 +#define QIXIS_RST_CTL_RESET 0x31 #define QIXIS_RCFG_CTL_RECONFIG_IDLE 0x20 #define QIXIS_RCFG_CTL_RECONFIG_START 0x21 #define QIXIS_RCFG_CTL_WATCHDOG_ENBLE 0x08 diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index 0ad5261..e55fcb2 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -175,6 +175,8 @@ /* Command line configuration */ #define CONFIG_CMD_ENV +#define CONFIG_MENU +#define CONFIG_CMD_PXE /* MMC */ #define CONFIG_MMC diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h index 44f86fa..857ad7b 100644 --- a/include/configs/ls1043ardb.h +++ b/include/configs/ls1043ardb.h @@ -14,8 +14,8 @@ #define SEC_FIRMWARE_ERET_ADDR_REVERT #define CONFIG_ARMV8_PSCI -#define CONFIG_SYS_LS_PPA_FW_IN_NOR -#ifdef CONFIG_SYS_LS_PPA_FW_IN_NOR +#define CONFIG_SYS_LS_PPA_FW_IN_XIP +#ifdef CONFIG_SYS_LS_PPA_FW_IN_XIP #define CONFIG_SYS_LS_PPA_FW_ADDR 0x60500000 #endif #endif diff --git a/include/fsl_mmdc.h b/include/fsl_mmdc.h index 281a819..a939d89 100644 --- a/include/fsl_mmdc.h +++ b/include/fsl_mmdc.h @@ -12,7 +12,7 @@ #define CONFIG_SYS_MMDC_CORE_TIMING_CFG_1 0xff328f64 #define CONFIG_SYS_MMDC_CORE_TIMING_CFG_2 0x01ff00db -#define CONFIG_SYS_MMDC_CORE_MISC 0x00000680 +#define CONFIG_SYS_MMDC_CORE_MISC 0x00001680 #define CONFIG_SYS_MMDC_PHY_MEASURE_UNIT 0x00000800 #define CONFIG_SYS_MMDC_CORE_RDWR_CMD_DELAY 0x00002000 #define CONFIG_SYS_MMDC_PHY_ODT_CTRL 0x0000022a @@ -43,7 +43,7 @@ #define CONFIG_SYS_MMDC_CORE_PWR_SAV_CTRL_STAT 0x00001067 -#define CONFIG_SYS_MMDC_CORE_REFRESH_CTL 0x103e8000 +#define CONFIG_SYS_MMDC_CORE_REFRESH_CTL 0x0f3c8000 #define START_REFRESH 0x00000001 |