ARM: dts: uniphier: update GPIO nodes

Switch to the single node design.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

7 files changed, 71 insertions, 802 deletions

diff --git a/arch/arm/dts/uniphier-ld11.dtsi b/arch/arm/dts/uniphier-ld11.dtsi
index 0f172c3..0cc6fd7 100644
--- a/arch/arm/dts/uniphier-ld11.dtsi
+++ b/arch/arm/dts/uniphier-ld11.dtsi
@@ -154,6 +154,29 @@
 			clock-frequency = <58820000>;
 		};
 
+		gpio: gpio@55000000 {
+			compatible = "socionext,uniphier-gpio";
+			reg = <0x55000000 0x200>;
+			interrupt-parent = <&aidet>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
+			gpio-controller;
+			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 0>,
+				      <&pinctrl 43 0 0>,
+				      <&pinctrl 51 0 0>,
+				      <&pinctrl 96 0 0>,
+				      <&pinctrl 160 0 0>,
+				      <&pinctrl 184 0 0>;
+			gpio-ranges-group-names = "gpio_range0",
+						  "gpio_range1",
+						  "gpio_range2",
+						  "gpio_range3",
+						  "gpio_range4",
+						  "gpio_range5";
+			ngpios = <200>;
+		};
+
 		i2c0: i2c@58780000 {
 			compatible = "socionext,uniphier-fi2c";
 			status = "disabled";
diff --git a/arch/arm/dts/uniphier-ld4.dtsi b/arch/arm/dts/uniphier-ld4.dtsi
index a3bcf22..b816038 100644
--- a/arch/arm/dts/uniphier-ld4.dtsi
+++ b/arch/arm/dts/uniphier-ld4.dtsi
@@ -108,116 +108,17 @@
 			clock-frequency = <36864000>;
 		};
 
-		port0x: gpio@55000008 {
+		gpio: gpio@55000000 {
 			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000008 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port1x: gpio@55000010 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000010 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port2x: gpio@55000018 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000018 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port3x: gpio@55000020 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000020 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port4: gpio@55000028 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000028 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port5x: gpio@55000030 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000030 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port6x: gpio@55000038 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000038 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port7x: gpio@55000040 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000040 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port8x: gpio@55000048 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000048 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port9x: gpio@55000050 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000050 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port10x: gpio@55000058 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000058 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port11x: gpio@55000060 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000060 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port12x: gpio@55000068 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000068 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port13x: gpio@55000070 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000070 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port14x: gpio@55000078 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000078 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port16x: gpio@55000088 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000088 0x8>;
+			reg = <0x55000000 0x200>;
+			interrupt-parent = <&aidet>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 0>;
+			gpio-ranges-group-names = "gpio_range";
+			ngpios = <136>;
 		};
 
 		i2c0: i2c@58400000 {
diff --git a/arch/arm/dts/uniphier-pro4.dtsi b/arch/arm/dts/uniphier-pro4.dtsi
index b45f23c..5f39972 100644
--- a/arch/arm/dts/uniphier-pro4.dtsi
+++ b/arch/arm/dts/uniphier-pro4.dtsi
@@ -116,207 +116,17 @@
 			clock-frequency = <73728000>;
 		};
 
-		port0x: gpio@55000008 {
+		gpio: gpio@55000000 {
 			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000008 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port1x: gpio@55000010 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000010 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port2x: gpio@55000018 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000018 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port3x: gpio@55000020 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000020 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port4: gpio@55000028 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000028 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port5x: gpio@55000030 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000030 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port6x: gpio@55000038 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000038 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port7x: gpio@55000040 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000040 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port8x: gpio@55000048 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000048 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port9x: gpio@55000050 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000050 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port10x: gpio@55000058 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000058 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port11x: gpio@55000060 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000060 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port12x: gpio@55000068 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000068 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port13x: gpio@55000070 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000070 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port14x: gpio@55000078 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000078 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port17x: gpio@550000a0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000a0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port18x: gpio@550000a8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000a8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port19x: gpio@550000b0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000b0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port20x: gpio@550000b8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000b8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port21x: gpio@550000c0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000c0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port22x: gpio@550000c8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000c8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port23x: gpio@550000d0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000d0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port24x: gpio@550000d8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000d8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port25x: gpio@550000e0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000e0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port26x: gpio@550000e8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000e8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port27x: gpio@550000f0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000f0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port28x: gpio@550000f8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000f8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port29x: gpio@55000100 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000100 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port30x: gpio@55000108 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000108 0x8>;
+			reg = <0x55000000 0x200>;
+			interrupt-parent = <&aidet>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 0>;
+			gpio-ranges-group-names = "gpio_range";
+			ngpios = <248>;
 		};
 
 		i2c0: i2c@58780000 {
diff --git a/arch/arm/dts/uniphier-pro5.dtsi b/arch/arm/dts/uniphier-pro5.dtsi
index 94eb656..950b02c 100644
--- a/arch/arm/dts/uniphier-pro5.dtsi
+++ b/arch/arm/dts/uniphier-pro5.dtsi
@@ -203,207 +203,17 @@
 			clock-frequency = <73728000>;
 		};
 
-		port0x: gpio@55000008 {
+		gpio: gpio@55000000 {
 			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000008 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port1x: gpio@55000010 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000010 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port2x: gpio@55000018 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000018 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port3x: gpio@55000020 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000020 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port4: gpio@55000028 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000028 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port5x: gpio@55000030 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000030 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port6x: gpio@55000038 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000038 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port7x: gpio@55000040 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000040 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port8x: gpio@55000048 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000048 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port9x: gpio@55000050 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000050 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port10x: gpio@55000058 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000058 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port11x: gpio@55000060 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000060 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port12x: gpio@55000068 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000068 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port13x: gpio@55000070 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000070 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port14x: gpio@55000078 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000078 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port17x: gpio@550000a0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000a0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port18x: gpio@550000a8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000a8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port19x: gpio@550000b0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000b0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port20x: gpio@550000b8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000b8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port21x: gpio@550000c0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000c0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port22x: gpio@550000c8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000c8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port23x: gpio@550000d0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000d0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port24x: gpio@550000d8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000d8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port25x: gpio@550000e0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000e0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port26x: gpio@550000e8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000e8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port27x: gpio@550000f0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000f0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port28x: gpio@550000f8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000f8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port29x: gpio@55000100 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000100 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port30x: gpio@55000108 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000108 0x8>;
+			reg = <0x55000000 0x200>;
+			interrupt-parent = <&aidet>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 0>;
+			gpio-ranges-group-names = "gpio_range";
+			ngpios = <248>;
 		};
 
 		i2c0: i2c@58780000 {
diff --git a/arch/arm/dts/uniphier-pxs2.dtsi b/arch/arm/dts/uniphier-pxs2.dtsi
index c304d90..ac84d15 100644
--- a/arch/arm/dts/uniphier-pxs2.dtsi
+++ b/arch/arm/dts/uniphier-pxs2.dtsi
@@ -178,200 +178,19 @@
 			clock-frequency = <88900000>;
 		};
 
-		port0x: gpio@55000008 {
+		gpio: gpio@55000000 {
 			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000008 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port1x: gpio@55000010 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000010 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port2x: gpio@55000018 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000018 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port3x: gpio@55000020 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000020 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port4: gpio@55000028 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000028 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port5x: gpio@55000030 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000030 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port6x: gpio@55000038 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000038 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port7x: gpio@55000040 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000040 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port8x: gpio@55000048 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000048 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port9x: gpio@55000050 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000050 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port10x: gpio@55000058 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000058 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port12x: gpio@55000068 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000068 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port13x: gpio@55000070 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000070 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port14x: gpio@55000078 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000078 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port15x: gpio@55000080 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000080 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port16x: gpio@55000088 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000088 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port17x: gpio@550000a0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000a0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port18x: gpio@550000a8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000a8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port19x: gpio@550000b0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000b0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port20x: gpio@550000b8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000b8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port21x: gpio@550000c0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000c0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port22x: gpio@550000c8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000c8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port23x: gpio@550000d0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000d0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port24x: gpio@550000d8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000d8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port25x: gpio@550000e0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000e0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port26x: gpio@550000e8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000e8 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port27x: gpio@550000f0 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000f0 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port28x: gpio@550000f8 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x550000f8 0x8>;
+			reg = <0x55000000 0x200>;
+			interrupt-parent = <&aidet>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 0>,
+				      <&pinctrl 96 0 0>;
+			gpio-ranges-group-names = "gpio_range0",
+						  "gpio_range1";
+			ngpios = <232>;
 		};
 
 		i2c0: i2c@58780000 {
diff --git a/arch/arm/dts/uniphier-pxs3.dtsi b/arch/arm/dts/uniphier-pxs3.dtsi
index 8944005..a004bd1 100644
--- a/arch/arm/dts/uniphier-pxs3.dtsi
+++ b/arch/arm/dts/uniphier-pxs3.dtsi
@@ -183,7 +183,7 @@
 		};
 
 		gpio: gpio@55000000 {
-			compatible = "socionext,uniphier-pxs3-gpio";
+			compatible = "socionext,uniphier-gpio";
 			reg = <0x55000000 0x200>;
 			interrupt-parent = <&aidet>;
 			interrupt-controller;
@@ -196,6 +196,7 @@
 			gpio-ranges-group-names = "gpio_range0",
 						  "gpio_range1",
 						  "gpio_range2";
+			ngpios = <286>;
 		};
 
 		i2c0: i2c@58780000 {
diff --git a/arch/arm/dts/uniphier-sld8.dtsi b/arch/arm/dts/uniphier-sld8.dtsi
index a3de26b..70a5ea4 100644
--- a/arch/arm/dts/uniphier-sld8.dtsi
+++ b/arch/arm/dts/uniphier-sld8.dtsi
@@ -108,116 +108,21 @@
 			clock-frequency = <80000000>;
 		};
 
-		port0x: gpio@55000008 {
+		gpio: gpio@55000000 {
 			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000008 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port1x: gpio@55000010 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000010 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port2x: gpio@55000018 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000018 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port3x: gpio@55000020 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000020 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port4: gpio@55000028 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000028 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port5x: gpio@55000030 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000030 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port6x: gpio@55000038 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000038 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port7x: gpio@55000040 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000040 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port8x: gpio@55000048 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000048 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port9x: gpio@55000050 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000050 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port10x: gpio@55000058 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000058 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port11x: gpio@55000060 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000060 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port12x: gpio@55000068 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000068 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port13x: gpio@55000070 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000070 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port14x: gpio@55000078 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000078 0x8>;
-			gpio-controller;
-			#gpio-cells = <2>;
-		};
-
-		port16x: gpio@55000088 {
-			compatible = "socionext,uniphier-gpio";
-			reg = <0x55000088 0x8>;
+			reg = <0x55000000 0x200>;
+			interrupt-parent = <&aidet>;
+			interrupt-controller;
+			#interrupt-cells = <2>;
 			gpio-controller;
 			#gpio-cells = <2>;
+			gpio-ranges = <&pinctrl 0 0 0>,
+				      <&pinctrl 104 0 0>,
+				      <&pinctrl 112 0 0>;
+			gpio-ranges-group-names = "gpio_range0",
+						  "gpio_range1",
+						  "gpio_range2";
+			ngpios = <136>;
 		};
 
 		i2c0: i2c@58400000 {