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author | Graeme Russ <graeme.russ@gmail.com> | 2010-04-23 14:06:00 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2010-05-05 22:20:56 (GMT) |
commit | 1f9f3cf6ccbccae1c1edff01ec20fe2a586b9701 (patch) | |
tree | bcc36d003534667bd3dc189aed3c1d8920604ea7 | |
parent | d20053efdf328d97a018536689fc55df4faf1094 (diff) | |
download | u-boot-1f9f3cf6ccbccae1c1edff01ec20fe2a586b9701.tar.xz |
sc520: Fix minor DRAM Controller Setup bug
Signed-off-by: Graeme Russ <graeme.russ@gmail.com>
-rw-r--r-- | arch/i386/cpu/sc520/sc520_asm.S | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/i386/cpu/sc520/sc520_asm.S b/arch/i386/cpu/sc520/sc520_asm.S index abb03bf..fff56c0 100644 --- a/arch/i386/cpu/sc520/sc520_asm.S +++ b/arch/i386/cpu/sc520/sc520_asm.S @@ -500,7 +500,7 @@ emptybank: /* just have your hardware desinger _GIVE_ you what you need here! */ movl $DRCTMCTL, %edi movb $CONFIG_SYS_SDRAM_DRCTMCTL,%al - movb (%edi), %al + movb %al, (%edi) #else #if defined(CONFIG_SYS_SDRAM_CAS_LATENCY_2T) || defined(CONFIG_SYS_SDRAM_CAS_LATENCY_3T) /* set the CAS latency now since it is hard to do |