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| author | Hou Zhiqiang <Zhiqiang.Hou@nxp.com> | 2017-09-04 02:47:52 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-09-11 15:01:07 (GMT) |
| commit | c4787f4b23a7903135f5884e756be3507308ca47 (patch) | |
| tree | 21dcb648f13e6204ce54081da9fdfdc8bbfeb858 | |
| parent | e9303a4146cdc1761c8156627a8265e43dc0dc58 (diff) | |
| download | u-boot-c4787f4b23a7903135f5884e756be3507308ca47.tar.xz | |
armv8: ls1088a: fix the MMU table for pcie config space
The pcie config space of ls1088a is different from ls2080a.
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
| -rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index 6c74ee0..957e23b 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -107,10 +107,16 @@ #define CONFIG_SYS_PCIE2_ADDR (CONFIG_SYS_IMMR + 0x2500000) #define CONFIG_SYS_PCIE3_ADDR (CONFIG_SYS_IMMR + 0x2600000) #define CONFIG_SYS_PCIE4_ADDR (CONFIG_SYS_IMMR + 0x2700000) +#ifdef CONFIG_ARCH_LS1088A +#define CONFIG_SYS_PCIE1_PHYS_ADDR 0x2000000000ULL +#define CONFIG_SYS_PCIE2_PHYS_ADDR 0x2800000000ULL +#define CONFIG_SYS_PCIE3_PHYS_ADDR 0x3000000000ULL +#else #define CONFIG_SYS_PCIE1_PHYS_ADDR 0x1000000000ULL #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x1200000000ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x1400000000ULL #define CONFIG_SYS_PCIE4_PHYS_ADDR 0x1600000000ULL +#endif /* Device Configuration */ #define DCFG_BASE 0x01e00000 |