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authorAllen Martin <amartin@nvidia.com>2012-08-31 08:30:09 (GMT)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-09-01 12:58:22 (GMT)
commitc037c93bf925224b7f4da8958ae14e58c0b3c8bb (patch)
treea7a3222b4483f7f6cd476af838d3d8f425391b2f /arch/arm/cpu/arm720t/interrupts.c
parent45ec5b2579e8f9e58f58d9face9147957e5a873e (diff)
downloadu-boot-c037c93bf925224b7f4da8958ae14e58c0b3c8bb.tar.xz
ARM: add tegra20 support to arm720t
Add support for tegra20 arm7 boot processor. This processor is used to power on the Cortex A9 and transfer control to it. In tegra this processor is an ARM7TDMI not an ARM720T, but since we don't use cache it was easier to just reuse the ARM720T code as the processors are otherwise identical except for cache and MMU. Signed-off-by: Allen Martin <amartin@nvidia.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Tested-by: Thierry Reding <thierry.reding@avionic-design.de> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/arm720t/interrupts.c')
-rw-r--r--arch/arm/cpu/arm720t/interrupts.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm720t/interrupts.c b/arch/arm/cpu/arm720t/interrupts.c
index 464dd30..c2f898f 100644
--- a/arch/arm/cpu/arm720t/interrupts.c
+++ b/arch/arm/cpu/arm720t/interrupts.c
@@ -180,6 +180,9 @@ int timer_init (void)
PUT32(T0TC, 0);
PUT32(T0TCR, 1); /* enable timer0 */
+#elif defined(CONFIG_TEGRA)
+ /* No timer routines for tegra as yet */
+ lastdec = 0;
#else
#error No timer_init() defined for this CPU type
#endif
@@ -282,6 +285,8 @@ void __udelay (unsigned long usec)
#elif defined(CONFIG_INTEGRATOR) && defined(CONFIG_ARCH_INTEGRATOR)
/* No timer routines for IntegratorAP/CM720T as yet */
+#elif defined(CONFIG_TEGRA)
+ /* No timer routines for tegra as yet */
#else
#error Timer routines not defined for this CPU type
#endif