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author | Wolfgang Denk <wd@denx.de> | 2010-09-09 19:39:46 (GMT) |
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committer | Wolfgang Denk <wd@denx.de> | 2010-09-09 19:39:46 (GMT) |
commit | 8fea51a4acb0c7da6fb375c9a708c50c0a1b66ad (patch) | |
tree | f6a3d36e35f8f4d1009c367417e918c210b0baf0 /arch/arm/cpu/arm926ejs/mb86r0x/clock.c | |
parent | 40e74c852b76accfe27d832f23ea3020352bc120 (diff) | |
parent | ec99d983418897b120409f71712d41c01a21bf7c (diff) | |
download | u-boot-8fea51a4acb0c7da6fb375c9a708c50c0a1b66ad.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-arm
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mb86r0x/clock.c')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mb86r0x/clock.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/mb86r0x/clock.c b/arch/arm/cpu/arm926ejs/mb86r0x/clock.c new file mode 100644 index 0000000..70c8c8b --- /dev/null +++ b/arch/arm/cpu/arm926ejs/mb86r0x/clock.c @@ -0,0 +1,43 @@ +/* + * (C) Copyright 2010 + * Matthias Weisser <weisserm@arcor.de> + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include <common.h> +#include <asm/io.h> +#include <asm/arch/hardware.h> + +/* + * Get the peripheral bus frequency depending on pll pin settings + */ +ulong get_bus_freq(ulong dummy) +{ + struct mb86r0x_crg * crg = (struct mb86r0x_crg *) + MB86R0x_CRG_BASE; + uint32_t pllmode; + + pllmode = readl(&crg->crpr) & MB86R0x_CRG_CRPR_PLLMODE; + + if (pllmode == MB86R0x_CRG_CRPR_PLLMODE_X20) + return 40000000; + + return 41164767; +} |