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author | Otavio Salvador <otavio@ossystems.com.br> | 2012-08-05 09:05:30 (GMT) |
---|---|---|
committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 12:58:17 (GMT) |
commit | ddcf13b15231ee2dca99285349b143c365ce5173 (patch) | |
tree | 1b2d1691b1af719b8699320bf58d9ff4602379c2 /arch/arm/cpu/arm926ejs/mxs/mx28.c | |
parent | 3a0398d7b916eed6ae80427626f0434690ca0da0 (diff) | |
download | u-boot-ddcf13b15231ee2dca99285349b143c365ce5173.tar.xz |
mxs: prefix register acessor macros with 'mxs' prefix
As the register accessing mode is the same for all i.MXS SoCs we ought
to use 'mxs' prefix intead of 'mx28'.
Signed-off-by: Otavio Salvador <otavio@ossystems.com.br>
Diffstat (limited to 'arch/arm/cpu/arm926ejs/mxs/mx28.c')
-rw-r--r-- | arch/arm/cpu/arm926ejs/mxs/mx28.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/arm926ejs/mxs/mx28.c b/arch/arm/cpu/arm926ejs/mxs/mx28.c index cf7a50f..65fcd75 100644 --- a/arch/arm/cpu/arm926ejs/mxs/mx28.c +++ b/arch/arm/cpu/arm926ejs/mxs/mx28.c @@ -81,7 +81,7 @@ void enable_caches(void) #endif } -int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout) +int mx28_wait_mask_set(struct mxs_register_32 *reg, uint32_t mask, int timeout) { while (--timeout) { if ((readl(®->reg) & mask) == mask) @@ -92,7 +92,7 @@ int mx28_wait_mask_set(struct mx28_register_32 *reg, uint32_t mask, int timeout) return !timeout; } -int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int timeout) +int mx28_wait_mask_clr(struct mxs_register_32 *reg, uint32_t mask, int timeout) { while (--timeout) { if ((readl(®->reg) & mask) == 0) @@ -103,7 +103,7 @@ int mx28_wait_mask_clr(struct mx28_register_32 *reg, uint32_t mask, int timeout) return !timeout; } -int mx28_reset_block(struct mx28_register_32 *reg) +int mx28_reset_block(struct mxs_register_32 *reg) { /* Clear SFTRST */ writel(MX28_BLOCK_SFTRST, ®->reg_clr); |