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| author | Stefan Roese <sr@denx.de> | 2015-08-18 07:27:19 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2015-08-28 16:33:17 (GMT) |
| commit | f49cc22f5c106c0b975182293200fe4cd53f371b (patch) | |
| tree | 48f3ece5256e2e8d8f72601417cd932f88875633 /arch/arm/cpu/arm926ejs | |
| parent | 2fbdbda1c7c48aa622812054633afc6cdff91eab (diff) | |
| download | u-boot-f49cc22f5c106c0b975182293200fe4cd53f371b.tar.xz | |
arm: spear: Enable caches on SPEAr
The designware ethernet driver supports d-cache now. So there is nothing
stopping us now to enable the caches completely on SPEAr.
Tested on SPEAr600 x600 board.
Signed-off-by: Stefan Roese <sr@denx.de>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Cc: Vipin Kumar <vk.vipin@gmail.com>
Diffstat (limited to 'arch/arm/cpu/arm926ejs')
| -rw-r--r-- | arch/arm/cpu/arm926ejs/spear/cpu.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/cpu/arm926ejs/spear/cpu.c b/arch/arm/cpu/arm926ejs/spear/cpu.c index 3037084..e39cdba 100644 --- a/arch/arm/cpu/arm926ejs/spear/cpu.c +++ b/arch/arm/cpu/arm926ejs/spear/cpu.c @@ -56,6 +56,16 @@ int arch_cpu_init(void) return 0; } +void enable_caches(void) +{ +#ifndef CONFIG_SYS_ICACHE_OFF + icache_enable(); +#endif +#ifndef CONFIG_SYS_DCACHE_OFF + dcache_enable(); +#endif +} + #ifdef CONFIG_DISPLAY_CPUINFO int print_cpuinfo(void) { |