diff options
| author | Tom Rini <trini@ti.com> | 2012-07-24 21:55:38 (GMT) |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-09-01 12:58:12 (GMT) |
| commit | ff7ec0f945d16dcd8fcb4b5347dca2770ac6cea4 (patch) | |
| tree | 7d205e21a7c377231440f23501ff3538107f3540 /arch/arm/cpu/armv7/am33xx/emif4.c | |
| parent | 87a1acbb6991521af2a8d1f75c2adacbece9ab5e (diff) | |
| download | u-boot-ff7ec0f945d16dcd8fcb4b5347dca2770ac6cea4.tar.xz | |
am33xx: Use emif_regs struct for storing initialization values
Rather than defining our own structs to note what to use when
programming the EMIF and related re-use the emif_regs struct.
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx/emif4.c')
| -rw-r--r-- | arch/arm/cpu/armv7/am33xx/emif4.c | 43 |
1 files changed, 13 insertions, 30 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/emif4.c b/arch/arm/cpu/armv7/am33xx/emif4.c index 66ab892..0190ec6 100644 --- a/arch/arm/cpu/armv7/am33xx/emif4.c +++ b/arch/arm/cpu/armv7/am33xx/emif4.c @@ -90,6 +90,15 @@ static const struct cmd_control ddr2_cmd_ctrl_data = { .cmd2iclkout = DDR2_INVERT_CLKOUT, }; +static const struct emif_regs ddr2_emif_reg_data = { + .sdram_config = DDR2_EMIF_SDCFG, + .ref_ctrl = DDR2_EMIF_SDREF, + .sdram_tim1 = DDR2_EMIF_TIM1, + .sdram_tim2 = DDR2_EMIF_TIM2, + .sdram_tim3 = DDR2_EMIF_TIM3, + .emif_ddr_phy_ctlr_1 = DDR2_EMIF_READ_LATENCY, +}; + static void config_vtp(void) { writel(readl(&vtpreg->vtp0ctrlreg) | VTP_CTRL_ENABLE, @@ -105,35 +114,6 @@ static void config_vtp(void) ; } -static void config_emif_ddr2(void) -{ - struct sdram_config cfg; - struct sdram_timing tmg; - struct ddr_phy_control phyc; - - /* Program EMIF0 CFG Registers */ - phyc.reg = DDR2_EMIF_READ_LATENCY; - phyc.reg_sh = DDR2_EMIF_READ_LATENCY; - phyc.reg2 = DDR2_EMIF_READ_LATENCY; - - tmg.time1 = DDR2_EMIF_TIM1; - tmg.time1_sh = DDR2_EMIF_TIM1; - tmg.time2 = DDR2_EMIF_TIM2; - tmg.time2_sh = DDR2_EMIF_TIM2; - tmg.time3 = DDR2_EMIF_TIM3; - tmg.time3_sh = DDR2_EMIF_TIM3; - - cfg.sdrcr = DDR2_EMIF_SDCFG; - cfg.sdrcr2 = DDR2_EMIF_SDCFG; - cfg.refresh = DDR2_EMIF_SDREF; - cfg.refresh_sh = DDR2_EMIF_SDREF; - - /* Program EMIF instance */ - config_ddr_phy(&phyc); - set_sdram_timings(&tmg); - config_sdram(&cfg); -} - void config_ddr(short ddr_type) { struct ddr_ioctrl ioctrl; @@ -163,7 +143,10 @@ void config_ddr(short ddr_type) /* Set CKE to be controlled by EMIF/DDR PHY */ writel(DDR_CKE_CTRL_NORMAL, &ddrctrl->ddrckectrl); - config_emif_ddr2(); + /* Program EMIF instance */ + config_ddr_phy(&ddr2_emif_reg_data); + set_sdram_timings(&ddr2_emif_reg_data); + config_sdram(&ddr2_emif_reg_data); } } #endif |