diff options
author | Heiko Schocher <hs@denx.de> | 2013-06-04 09:01:06 (GMT) |
---|---|---|
committer | Tom Rini <trini@ti.com> | 2013-06-18 13:18:46 (GMT) |
commit | 7b9c5d0bfd906a57a46336b5505550024a8a761f (patch) | |
tree | f7a4446f055127881779897e4dfaac49b6f4f0fc /arch/arm/cpu/armv7/am33xx | |
parent | 49f783650020c62fdba4a78d4d272dca22d33662 (diff) | |
download | u-boot-7b9c5d0bfd906a57a46336b5505550024a8a761f.tar.xz |
arm, am335x: make mpu pll config configurable
upcoming support for siemens boards switches mpu pll clk in board
code. So make this configurable.
Signed-off-by: Heiko Schocher <hs@denx.de>
Cc: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/am33xx')
-rw-r--r-- | arch/arm/cpu/armv7/am33xx/clock_am33xx.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c index a1efc75..9c4d0b4 100644 --- a/arch/arm/cpu/armv7/am33xx/clock_am33xx.c +++ b/arch/arm/cpu/armv7/am33xx/clock_am33xx.c @@ -246,7 +246,7 @@ static void enable_per_clocks(void) ; } -static void mpu_pll_config(void) +void mpu_pll_config_val(int mpull_m) { u32 clkmode, clksel, div_m2; @@ -260,7 +260,7 @@ static void mpu_pll_config(void) ; clksel = clksel & (~CLK_SEL_MASK); - clksel = clksel | ((MPUPLL_M << CLK_SEL_SHIFT) | MPUPLL_N); + clksel = clksel | ((mpull_m << CLK_SEL_SHIFT) | MPUPLL_N); writel(clksel, &cmwkup->clkseldpllmpu); div_m2 = div_m2 & ~CLK_DIV_MASK; @@ -274,6 +274,11 @@ static void mpu_pll_config(void) ; } +static void mpu_pll_config(void) +{ + mpu_pll_config_val(CONFIG_SYS_MPUCLK); +} + static void core_pll_config(void) { u32 clkmode, clksel, div_m4, div_m5, div_m6; |