diff options
| author | Michal Simek <michal.simek@xilinx.com> | 2013-05-08 13:37:28 (GMT) |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2013-08-12 06:59:55 (GMT) |
| commit | 39523bef29f71967247ca00fe4b2c7e0831bb8a2 (patch) | |
| tree | 13eb99a9c67cb1a21cadfb5089249310be548abd /arch/arm/cpu/armv7/exynos | |
| parent | 148ba55cc618eaca19d7c86bdc003a7a71ee3a92 (diff) | |
| download | u-boot-39523bef29f71967247ca00fe4b2c7e0831bb8a2.tar.xz | |
zynq: slcr: Wait 100ms till clk is properly setup
If you don't wait you will loose the first sent packet
even all bits in emacps are correctly setup.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Diffstat (limited to 'arch/arm/cpu/armv7/exynos')
0 files changed, 0 insertions, 0 deletions