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authorNitin Garg <nitin.garg@freescale.com>2014-09-16 18:33:25 (GMT)
committerStefano Babic <sbabic@denx.de>2014-09-22 14:21:04 (GMT)
commit36c1ca4d46ef11ac7b3c0afb5c42dadb4e8773f3 (patch)
treeb5dbaad08e0c4cc6a5ac7143784c6b22d97e82c5 /arch/arm/cpu/armv7/mx6/soc.c
parent4f797c4c1c93b508928786f539cd6a4a98a68f22 (diff)
downloadu-boot-36c1ca4d46ef11ac7b3c0afb5c42dadb4e8773f3.tar.xz
imx: Support i.MX6 High Assurance Boot authentication
When CONFIG_SECURE_BOOT is enabled, the signed images like kernel and dtb can be authenticated using iMX6 CAAM. The added command hab_auth_img can be used for HAB authentication of images. The command takes the image DDR location, IVT (Image Vector Table) offset inside image as parameters. Detailed info about signing images can be found in Freescale AppNote AN4581. Signed-off-by: Nitin Garg <nitin.garg@freescale.com>
Diffstat (limited to 'arch/arm/cpu/armv7/mx6/soc.c')
-rw-r--r--arch/arm/cpu/armv7/mx6/soc.c15
1 files changed, 15 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/mx6/soc.c b/arch/arm/cpu/armv7/mx6/soc.c
index ba21cfe..05683a3 100644
--- a/arch/arm/cpu/armv7/mx6/soc.c
+++ b/arch/arm/cpu/armv7/mx6/soc.c
@@ -273,10 +273,25 @@ int board_postclk_init(void)
#ifndef CONFIG_SYS_DCACHE_OFF
void enable_caches(void)
{
+#if defined(CONFIG_SYS_ARM_CACHE_WRITETHROUGH)
+ enum dcache_option option = DCACHE_WRITETHROUGH;
+#else
+ enum dcache_option option = DCACHE_WRITEBACK;
+#endif
+
/* Avoid random hang when download by usb */
invalidate_dcache_all();
+
/* Enable D-cache. I-cache is already enabled in start.S */
dcache_enable();
+
+ /* Enable caching on OCRAM and ROM */
+ mmu_set_region_dcache_behaviour(ROMCP_ARB_BASE_ADDR,
+ ROMCP_ARB_END_ADDR,
+ option);
+ mmu_set_region_dcache_behaviour(IRAM_BASE_ADDR,
+ IRAM_SIZE,
+ option);
}
#endif