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| author | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 08:46:36 (GMT) |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2015-10-14 08:46:36 (GMT) |
| commit | 13a3972585af60ec367d209cedbd3601e0c77467 (patch) | |
| tree | 4b3312669b3e501f6bc10b39d8c7bbf516f07aac /arch/arm/cpu/armv7/nonsec_virt.S | |
| parent | 208bd51396fb606dbdcf45b064e6b372d7dd3e81 (diff) | |
| parent | 297faccca2235e359012118495b9b73451d54bb9 (diff) | |
| download | u-boot-13a3972585af60ec367d209cedbd3601e0c77467.tar.xz | |
Merge remote-tracking branch 'u-boot/master'
Diffstat (limited to 'arch/arm/cpu/armv7/nonsec_virt.S')
| -rw-r--r-- | arch/arm/cpu/armv7/nonsec_virt.S | 14 |
1 files changed, 14 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/nonsec_virt.S b/arch/arm/cpu/armv7/nonsec_virt.S index 30d81db..31d1c9e 100644 --- a/arch/arm/cpu/armv7/nonsec_virt.S +++ b/arch/arm/cpu/armv7/nonsec_virt.S @@ -53,6 +53,20 @@ _secure_monitor: bl psci_arch_init #endif +#ifdef CONFIG_ARM_ERRATA_773022 + mrc p15, 0, r5, c1, c0, 1 + orr r5, r5, #(1 << 1) + mcr p15, 0, r5, c1, c0, 1 + isb +#endif + +#ifdef CONFIG_ARM_ERRATA_774769 + mrc p15, 0, r5, c1, c0, 1 + orr r5, r5, #(1 << 25) + mcr p15, 0, r5, c1, c0, 1 + isb +#endif + mrc p15, 0, r5, c1, c1, 0 @ read SCR bic r5, r5, #0x4a @ clear IRQ, EA, nET bits orr r5, r5, #0x31 @ enable NS, AW, FW bits |