diff options
| author | Govindraj.R <govindraj.raja@ti.com> | 2012-02-06 03:55:35 (GMT) |
|---|---|---|
| committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2012-02-12 09:11:31 (GMT) |
| commit | 95f87910422020fbbdc3dbbdd3e00f84c53b0b26 (patch) | |
| tree | 3e09d30583f6f3faa8c0c8ec8d74135acc17b226 /arch/arm/cpu/armv7/omap3 | |
| parent | 43b62393da6dfdd7f503d1b37344463a05ea47b5 (diff) | |
| download | u-boot-95f87910422020fbbdc3dbbdd3e00f84c53b0b26.tar.xz | |
OMAP3+: Clock: Adding ehci clock enabling
Adding ehci clock enabling mechanism part of clock framework.
When essential clocks are enabled during init phase usb host
clocks can also be enabled from clock framework.
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/cpu/armv7/omap3')
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/board.c | 4 | ||||
| -rw-r--r-- | arch/arm/cpu/armv7/omap3/clock.c | 20 |
2 files changed, 24 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c index 871aa37..054e9c4 100644 --- a/arch/arm/cpu/armv7/omap3/board.c +++ b/arch/arm/cpu/armv7/omap3/board.c @@ -228,6 +228,10 @@ void s_init(void) per_clocks_enable(); +#ifdef CONFIG_USB_EHCI_OMAP + ehci_clocks_enable(); +#endif + #ifdef CONFIG_SPL_BUILD preloader_console_init(); diff --git a/arch/arm/cpu/armv7/omap3/clock.c b/arch/arm/cpu/armv7/omap3/clock.c index e0d65c7..567817e 100644 --- a/arch/arm/cpu/armv7/omap3/clock.c +++ b/arch/arm/cpu/armv7/omap3/clock.c @@ -626,6 +626,26 @@ void prcm_init(void) sdelay(5000); } +/* + * Enable usb ehci uhh, tll clocks + */ +void ehci_clocks_enable(void) +{ + struct prcm *prcm_base = (struct prcm *)PRCM_BASE; + + /* Enable USBHOST_L3_ICLK (USBHOST_MICLK) */ + sr32(&prcm_base->iclken_usbhost, 0, 1, 1); + /* + * Enable USBHOST_48M_FCLK (USBHOST_FCLK1) + * and USBHOST_120M_FCLK (USBHOST_FCLK2) + */ + sr32(&prcm_base->fclken_usbhost, 0, 2, 3); + /* Enable USBTTL_ICLK */ + sr32(&prcm_base->iclken3_core, 2, 1, 1); + /* Enable USBTTL_FCLK */ + sr32(&prcm_base->fclken3_core, 2, 1, 1); +} + /****************************************************************************** * peripheral_enable() - Enable the clks & power for perifs (GPT2, UART1,...) *****************************************************************************/ |