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| author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-02-17 23:33:37 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@ti.com> | 2013-03-11 15:06:11 (GMT) |
| commit | d4e4129c31cf571824a1b34aa0b9210c876be718 (patch) | |
| tree | 24bcc9f3d42eafdac0786f7f10075398f06acc61 /arch/arm/cpu/armv7/omap5/hwinit.c | |
| parent | d4d986ee27fe6a78e50d4789d5b08b87a5e64892 (diff) | |
| download | u-boot-d4e4129c31cf571824a1b34aa0b9210c876be718.tar.xz | |
arm: dra7xx: clock: Add the prcm changes
PRCM register addresses are changed from OMAP5 ES2.0 to DRA7XX.
So adding the necessary register changes for DRA7XX socs.
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap5/hwinit.c')
| -rw-r--r-- | arch/arm/cpu/armv7/omap5/hwinit.c | 9 |
1 files changed, 7 insertions, 2 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c index f083198..d291da9 100644 --- a/arch/arm/cpu/armv7/omap5/hwinit.c +++ b/arch/arm/cpu/armv7/omap5/hwinit.c @@ -351,7 +351,12 @@ void reset_cpu(ulong ignored) * So use cold reset in case instead. */ if (omap_rev == OMAP5430_ES1_0) - writel(PRM_RSTCTRL_RESET << 0x1, PRM_RSTCTRL); + writel(PRM_RSTCTRL_RESET << 0x1, (*prcm)->prm_rstctrl); else - writel(PRM_RSTCTRL_RESET, PRM_RSTCTRL); + writel(PRM_RSTCTRL_RESET, (*prcm)->prm_rstctrl); +} + +u32 warm_reset(void) +{ + return readl((*prcm)->prm_rstst) & PRM_RSTST_WARM_RESET_MASK; } |