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authorSRICHARAN R <r.sricharan@ti.com>2012-03-12 02:25:40 (GMT)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2012-05-15 06:31:24 (GMT)
commit087189fb54b49a4656255d60052ad047f974c7d6 (patch)
tree8660d938bce2ff24a569a31df50e23a8a180b7ed /arch/arm/cpu/armv7/omap5
parentcdd50a8d07cc648e8e2ec7b3f551b24bf2c45915 (diff)
downloadu-boot-087189fb54b49a4656255d60052ad047f974c7d6.tar.xz
OMAP4/5: Make the silicon revision variable common.
The different silicon revision variable names was defined for OMAP4 and OMAP5 socs. Making the variable common so that some code can be made generic. Signed-off-by: R Sricharan <r.sricharan@ti.com>
Diffstat (limited to 'arch/arm/cpu/armv7/omap5')
-rw-r--r--arch/arm/cpu/armv7/omap5/hwinit.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index 68cf558..84b3830 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -38,7 +38,7 @@
DECLARE_GLOBAL_DATA_PTR;
-u32 *const omap5_revision = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV;
+u32 *const omap_si_rev = (u32 *)OMAP5_SRAM_SCRATCH_OMAP5_REV;
static struct gpio_bank gpio_bank_54xx[6] = {
{ (void *)OMAP54XX_GPIO1_BASE, METHOD_GPIO_24XX },
@@ -154,9 +154,9 @@ void init_omap_revision(void)
switch (rev) {
case MIDR_CORTEX_A15_R0P0:
- *omap5_revision = OMAP5430_ES1_0;
+ *omap_si_rev = OMAP5430_ES1_0;
break;
default:
- *omap5_revision = OMAP5430_SILICON_ID_INVALID;
+ *omap_si_rev = OMAP5430_SILICON_ID_INVALID;
}
}