diff options
| author | Yuantian Tang <andy.tang@nxp.com> | 2017-04-19 05:27:39 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-04-24 16:07:12 (GMT) |
| commit | 026f30ec3e846edb85b5df8265d8cad098184be6 (patch) | |
| tree | dd04857c18d73ef4ed0fc809c72cfe4ab8d2f101 /arch/arm/cpu/armv8/fsl-layerscape/cpu.c | |
| parent | d14428c729fb620da73234f5a8862066454de44c (diff) | |
| download | u-boot-026f30ec3e846edb85b5df8265d8cad098184be6.tar.xz | |
arm: psci: make psci usable on single core socs
PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/cpu.c')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 35 |
1 files changed, 16 insertions, 19 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index c24f3f1..bb02960 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -15,18 +15,14 @@ #include <asm/arch/soc.h> #include <asm/arch/cpu.h> #include <asm/arch/speed.h> -#ifdef CONFIG_MP #include <asm/arch/mp.h> -#endif #include <efi_loader.h> #include <fm_eth.h> #include <fsl-mc/fsl_mc.h> #ifdef CONFIG_FSL_ESDHC #include <fsl_esdhc.h> #endif -#ifdef CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT #include <asm/armv8/sec_firmware.h> -#endif #ifdef CONFIG_SYS_FSL_DDR #include <fsl_ddr.h> #endif @@ -475,13 +471,19 @@ int cpu_eth_init(bd_t *bis) return error; } -int arch_early_init_r(void) +static inline int check_psci(void) { -#ifdef CONFIG_MP - int rv = 1; - u32 psci_ver = 0xffffffff; -#endif + unsigned int psci_ver; + psci_ver = sec_firmware_support_psci_version(); + if (psci_ver == PSCI_INVALID_VER) + return 1; + + return 0; +} + +int arch_early_init_r(void) +{ #ifdef CONFIG_SYS_FSL_ERRATUM_A009635 u32 svr_dev_id; /* @@ -495,18 +497,13 @@ int arch_early_init_r(void) #if defined(CONFIG_SYS_FSL_ERRATUM_A009942) && defined(CONFIG_SYS_FSL_DDR) erratum_a009942_check_cpo(); #endif -#ifdef CONFIG_MP -#if defined(CONFIG_ARMV8_SEC_FIRMWARE_SUPPORT) && \ - defined(CONFIG_SEC_FIRMWARE_ARMV8_PSCI) - /* Check the psci version to determine if the psci is supported */ - psci_ver = sec_firmware_support_psci_version(); -#endif - if (psci_ver == 0xffffffff) { - rv = fsl_layerscape_wake_seconday_cores(); - if (rv) + if (check_psci()) { + debug("PSCI: PSCI does not exist.\n"); + + /* if PSCI does not exist, boot secondary cores here */ + if (fsl_layerscape_wake_seconday_cores()) printf("Did not wake secondary cores\n"); } -#endif #ifdef CONFIG_SYS_HAS_SERDES fsl_serdes_init(); |