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| author | York Sun <york.sun@nxp.com> | 2017-03-27 18:41:01 (GMT) |
|---|---|---|
| committer | York Sun <york.sun@nxp.com> | 2017-04-17 16:03:30 (GMT) |
| commit | 4a3ab193222d495ad55b3902fde2654489ad767b (patch) | |
| tree | e27714fadc6374628fed5f0e2b62ef08566e99ad /arch/arm/cpu/armv8/fsl-layerscape/cpu.c | |
| parent | 511fc86d0b1b603532056c663c22b91056908755 (diff) | |
| download | u-boot-4a3ab193222d495ad55b3902fde2654489ad767b.tar.xz | |
armv8: ls2080a: Drop macro CONFIG_LS2080A
Use CONFIG_ARCH_LS2080A instead.
Signed-off-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/cpu.c')
| -rw-r--r-- | arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c index d446527..c24f3f1 100644 --- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c +++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c @@ -92,7 +92,7 @@ static inline void early_mmu_setup(void) static void fix_pcie_mmu_map(void) { -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A unsigned int i; u32 svr, ver; struct ccsr_gur __iomem *gur = (void *)(CONFIG_SYS_FSL_GUTS_ADDR); @@ -523,7 +523,7 @@ int timer_init(void) #ifdef CONFIG_FSL_LSCH3 u32 __iomem *cltbenr = (u32 *)CONFIG_SYS_FSL_PMU_CLTBENR; #endif -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A u32 __iomem *pctbenr = (u32 *)FSL_PMU_PCTBENR_OFFSET; u32 svr_dev_id; #endif @@ -541,7 +541,7 @@ int timer_init(void) out_le32(cltbenr, 0xf); #endif -#ifdef CONFIG_LS2080A +#ifdef CONFIG_ARCH_LS2080A /* * In certain Layerscape SoCs, the clock for each core's * has an enable bit in the PMU Physical Core Time Base Enable |