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authorAlexander Graf <agraf@suse.de>2016-03-21 19:26:12 (GMT)
committerYork Sun <york.sun@nxp.com>2016-03-21 19:42:10 (GMT)
commitc05016ab0b122b28395f0532e6447e5ec2705fe9 (patch)
treecd252c3b68cd8b6024259c6b50f52325f32d9da3 /arch/arm/cpu/armv8/fsl-layerscape/cpu.c
parentf23baa572f96e1e13d7f1a3c8addb61b5d0dbd29 (diff)
downloadu-boot-c05016ab0b122b28395f0532e6447e5ec2705fe9.tar.xz
arm64: Fix layerscape mmu setup
With commit 7985cdf we converted all systems except for the Layerscape SoCs to the generic descriptor table based page table setup. On the Layerscape SoCs however, we just provide an empty table stub and do the setup ourselves. To reserve enough memory for the tables, we need to override the default counting mechanism which would end up with an empty table because we have no maps. Fixes: 7985cdf Reported-by: York Sun <york.sun@nxp.com> CC: Alison Wang <alison.wang@nxp.com> CC: Prabhakar Kushwaha <prabhakar.kushwaha@nxp.com> Signed-off-by: Alexander Graf <agraf@suse.de> Tested-by: York Sun <york.sun@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape/cpu.c')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/cpu.c5
1 files changed, 5 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
index 7404bd9..4b9e209 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
@@ -410,6 +410,11 @@ static inline void final_mmu_setup(void)
*/
}
+u64 get_page_table_size(void)
+{
+ return 0x10000;
+}
+
int arch_cpu_init(void)
{
icache_enable();