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authorSantan Kumar <santan.kumar@nxp.com>2017-04-05 09:04:32 (GMT)
committerYork Sun <york.sun@nxp.com>2017-04-17 16:03:30 (GMT)
commitdf1a51df3bbd350bb391826b5d96d2152002f7ac (patch)
treea506e6446dae16e6006652d31f0362d12e0fccea /arch/arm/cpu/armv8/fsl-layerscape
parentfb806ad61f8ff10f3abb14dfadfe0f8989665445 (diff)
downloadu-boot-df1a51df3bbd350bb391826b5d96d2152002f7ac.tar.xz
armv8: ls2080a: Add serdes2 protocol 0x51 support
Signed-off-by: Santan Kumar <santan.kumar@nxp.com> Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com> Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/cpu/armv8/fsl-layerscape')
-rw-r--r--arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
index ab83e85..4db3c76 100644
--- a/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
+++ b/arch/arm/cpu/armv8/fsl-layerscape/ls2080a_serdes.c
@@ -70,6 +70,7 @@ static struct serdes_config serdes2_cfg_tbl[] = {
SATA2 } },
{0x4A, {SGMII9, SGMII10, SGMII11, SGMII12, PCIE4, PCIE4, SATA1,
SATA2 } },
+ {0x51, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, PCIE4, PCIE4 } },
{0x57, {PCIE3, PCIE3, PCIE3, PCIE3, PCIE4, PCIE4, SGMII15, SGMII16 } },
{}
};