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authorThierry Reding <treding@nvidia.com>2014-12-10 05:25:07 (GMT)
committerTom Warren <twarren@nvidia.com>2014-12-18 20:19:20 (GMT)
commit59cb3bf4c6d87448b4fb4e0fd386ac6d170a19b6 (patch)
tree6012fd94ef7090a2969775c6e72c9db265aeb2a1 /arch/arm/cpu/tegra30-common/clock.c
parenta7230745504552095594362b81caaa33b5d7da5e (diff)
downloadu-boot-59cb3bf4c6d87448b4fb4e0fd386ac6d170a19b6.tar.xz
ARM: tegra: Provide PCIEXCLK reset ID
This reset is required for PCIe and the corresponding ID therefore needs to be defined. The enumeration value for this was properly defined on some SoCs but not on others. Similarly, some contained it in the mapping of peripheral IDs to clock IDs, other didn't. This patch defines it consistently for all supported SoC generations. Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Simon Glass <sjg@chromium.org> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/cpu/tegra30-common/clock.c')
-rw-r--r--arch/arm/cpu/tegra30-common/clock.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/tegra30-common/clock.c b/arch/arm/cpu/tegra30-common/clock.c
index 8e5c498..0eb0f0a 100644
--- a/arch/arm/cpu/tegra30-common/clock.c
+++ b/arch/arm/cpu/tegra30-common/clock.c
@@ -564,6 +564,7 @@ enum periph_id clk_id_to_periph_id(int clk_id)
case PERIPH_ID_RESERVED43:
case PERIPH_ID_RESERVED45:
case PERIPH_ID_RESERVED56:
+ case PERIPH_ID_PCIEXCLK:
case PERIPH_ID_RESERVED76:
case PERIPH_ID_RESERVED77:
case PERIPH_ID_RESERVED78: