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author | Russ Dill <Russ.Dill@ti.com> | 2016-07-21 11:28:32 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-07-25 16:00:06 (GMT) |
commit | 335b4e53c9c5310c36f5178d2f66a13c4b1c8592 (patch) | |
tree | 139507bd5709732c4c048bedaf6c1806f1cbaf22 /arch/arm/cpu/u-boot.lds | |
parent | 3325b06556b78a2afdaaa781765b505f7d1f8ae4 (diff) | |
download | u-boot-335b4e53c9c5310c36f5178d2f66a13c4b1c8592.tar.xz |
ARM: am33xx: Always inhibit init/refresh during DDR phy init
A couple of commits have modified the am33xx/am437x ddr2/ddr3
initialization path to fix certain issues, but have had the side effect
of causing L3 noc errors during initialization. The two commits are:
69b918 "am33xx,ddr3: fix ddr3 sdram configuration"
fc46ba "arm: am437x: Enable hardware leveling for EMIF"
The EMIF_REG_INITREF_DIS_MASK bit still needs to be set for all
platforms. This delays initialization and refresh until a later stage.
The 500us timer can be programmed for platforms that require it
and for platforms that don't require it. It is currently hardcoded
for 400MHz systems. For systems with a higher memory frequency
this needs to be a larger value, and for systems with a lower
memory frequency this can be a lower value. This can be
considered a separate issue and corrected in a later commit.
Signed-off-by: Russ Dill <Russ.Dill@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/cpu/u-boot.lds')
0 files changed, 0 insertions, 0 deletions