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authorPiotr Wilczek <p.wilczek@samsung.com>2012-09-20 00:19:57 (GMT)
committerMinkyu Kang <mk7.kang@samsung.com>2012-11-15 12:08:18 (GMT)
commita3eab2ac4156fb12f9c29ba4badd68a37926397b (patch)
treebd52a915a806350fcd7a043d2226a6d5102c8424 /arch/arm/cpu
parent11c5bc0b9d3d0f3416734515e612fcbf962afb6e (diff)
downloadu-boot-a3eab2ac4156fb12f9c29ba4badd68a37926397b.tar.xz
arm:exynos4:pinmux: Modify the gpio function for mmc
This patch add pinmux settings for Exynos4 for mmc0 and mmc2 Signed-off-by: Piotr Wilczek <p.wilczek@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Diffstat (limited to 'arch/arm/cpu')
-rw-r--r--arch/arm/cpu/armv7/exynos/pinmux.c58
1 files changed, 58 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..5796d56 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -265,10 +265,68 @@ static int exynos5_pinmux_config(int peripheral, int flags)
return 0;
}
+static int exynos4_mmc_config(int peripheral, int flags)
+{
+ struct exynos4_gpio_part2 *gpio2 =
+ (struct exynos4_gpio_part2 *)samsung_get_base_gpio_part2();
+ struct s5p_gpio_bank *bank, *bank_ext;
+ int i;
+
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ bank = &gpio2->k0;
+ bank_ext = &gpio2->k1;
+ break;
+ case PERIPH_ID_SDMMC2:
+ bank = &gpio2->k2;
+ bank_ext = &gpio2->k3;
+ break;
+ default:
+ return -1;
+ }
+ for (i = 0; i < 7; i++) {
+ if (i == 2)
+ continue;
+ s5p_gpio_cfg_pin(bank, i, GPIO_FUNC(0x2));
+ s5p_gpio_set_pull(bank, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank, i, GPIO_DRV_4X);
+ }
+ if (flags & PINMUX_FLAG_8BIT_MODE) {
+ for (i = 3; i < 7; i++) {
+ s5p_gpio_cfg_pin(bank_ext, i, GPIO_FUNC(0x3));
+ s5p_gpio_set_pull(bank_ext, i, GPIO_PULL_NONE);
+ s5p_gpio_set_drv(bank_ext, i, GPIO_DRV_4X);
+ }
+ }
+
+ return 0;
+}
+
+static int exynos4_pinmux_config(int peripheral, int flags)
+{
+ switch (peripheral) {
+ case PERIPH_ID_SDMMC0:
+ case PERIPH_ID_SDMMC2:
+ return exynos4_mmc_config(peripheral, flags);
+ case PERIPH_ID_SDMMC1:
+ case PERIPH_ID_SDMMC3:
+ case PERIPH_ID_SDMMC4:
+ printf("SDMMC device %d not implemented\n", peripheral);
+ return -1;
+ default:
+ debug("%s: invalid peripheral %d", __func__, peripheral);
+ return -1;
+ }
+
+ return 0;
+}
+
int exynos_pinmux_config(int peripheral, int flags)
{
if (cpu_is_exynos5())
return exynos5_pinmux_config(peripheral, flags);
+ else if (cpu_is_exynos4())
+ return exynos4_pinmux_config(peripheral, flags);
else {
debug("pinmux functionality not supported\n");
return -1;