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| author | Peter Crosthwaite <crosthwaitepeter@gmail.com> | 2014-08-28 11:16:39 (GMT) |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2014-11-11 10:02:07 (GMT) |
| commit | 9757b65befff800303f053d95d49b167a0d159a2 (patch) | |
| tree | 5e566170229207049451ce212aee2f54a1bbd173 /arch/arm/dts/Makefile | |
| parent | 290f1f999a42fd08f3483722a61e2d9e0901eb17 (diff) | |
| download | u-boot-9757b65befff800303f053d95d49b167a0d159a2.tar.xz | |
arm: dts: zynq: Add digilent ZYBO board dts
It's a Zynq board similar in design to the currently supported ones.
512MB of RAM and UART1 is used.
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Acked-by: Jagannadha Sutradharudu Teki <jaganna@xilinx.com>
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/Makefile')
| -rw-r--r-- | arch/arm/dts/Makefile | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 52f8926..8977d4b 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -34,6 +34,7 @@ dtb-$(CONFIG_TEGRA) += tegra20-harmony.dtb \ dtb-$(CONFIG_ZYNQ) += zynq-zc702.dtb \ zynq-zc706.dtb \ zynq-zed.dtb \ + zynq-zybo.dtb \ zynq-microzed.dtb \ zynq-zc770-xm010.dtb \ zynq-zc770-xm012.dtb \ |