aspeed: Add basic ast2500-specific drivers and configuration

Clock Driver

This driver is ast2500-specific and is not compatible with earlier
versions of this chip. The differences are not that big, but they are
in somewhat random places, so making it compatible with ast2400 is not
worth the effort at the moment.

SDRAM MC driver

The driver is very ast2500-specific and is completely incompatible
with previous versions of the chip.

The memory controller is very poorly documented by Aspeed in the
datasheet, with any mention of the whole range of registers missing. The
initialization procedure has been basically taken from Aspeed SDK, where
it is implemented in assembly. Here it is rewritten in C, with very limited
understanding of what exactly it is doing.
Reviewed-by: Simon Glass <sjg@chromium.org>

1 files changed, 53 insertions, 0 deletions

diff --git a/arch/arm/dts/ast2500-u-boot.dtsi b/arch/arm/dts/ast2500-u-boot.dtsi
new file mode 100644
index 0000000..c95a7ba
--- /dev/null
+++ b/arch/arm/dts/ast2500-u-boot.dtsi
@@ -0,0 +1,53 @@
+#include <dt-bindings/clock/ast2500-scu.h>
+
+#include "ast2500.dtsi"
+
+/ {
+	scu: clock-controller@1e6e2000 {
+		compatible = "aspeed,ast2500-scu";
+		reg = <0x1e6e2000 0x1000>;
+		u-boot,dm-pre-reloc;
+		#clock-cells = <1>;
+		#reset-cells = <1>;
+	};
+
+	sdrammc: sdrammc@1e6e0000 {
+		u-boot,dm-pre-reloc;
+		compatible = "aspeed,ast2500-sdrammc";
+		reg = <0x1e6e0000 0x174
+			0x1e6e0200 0x1d4 >;
+		clocks = <&scu PLL_MPLL>;
+	};
+
+	ahb {
+		u-boot,dm-pre-reloc;
+
+		apb {
+			u-boot,dm-pre-reloc;
+
+			timer: timer@1e782000 {
+				u-boot,dm-pre-reloc;
+			};
+
+			uart1: serial@1e783000 {
+				clocks = <&scu PCLK_UART1>;
+			};
+
+			uart2: serial@1e78d000 {
+				clocks = <&scu PCLK_UART2>;
+			};
+
+			uart3: serial@1e78e000 {
+				clocks = <&scu PCLK_UART3>;
+			};
+
+			uart4: serial@1e78f000 {
+				clocks = <&scu PCLK_UART4>;
+			};
+
+			uart5: serial@1e784000 {
+				clocks = <&scu PCLK_UART5>;
+			};
+		};
+	};
+};