diff options
| author | Vignesh R <vigneshr@ti.com> | 2016-07-06 04:56:03 (GMT) |
|---|---|---|
| committer | Jagan Teki <jteki@openedev.com> | 2016-07-09 14:46:33 (GMT) |
| commit | e835a74159798723592e3c45d06793cd6acaf7ff (patch) | |
| tree | 710f5d7ea4336350a6f0ee4239472a1c77a65326 /arch/arm/dts/dra72-evm.dts | |
| parent | 988fb5ce610bbd2cc5a839cce737bba307e94db7 (diff) | |
| download | u-boot-e835a74159798723592e3c45d06793cd6acaf7ff.tar.xz | |
ARM: dts: dra7x: Support QSPI MODE-0 operation at 64MHz
According to Data Manual(SPRS915P) of AM57x, TI QSPI controller on
DRA74(rev 1.1+)/DRA72 EVM can support up to 64MHz in MODE-0, whereas
MODE-3 is limited to 48MHz. Hence, switch to MODE-0 for better
throughput.
Signed-off-by: Vignesh R <vigneshr@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Mugunthan V N <mugunthanvnm@ti.com>
Reviewed-by: Jagan Teki <jteki@openedev.com>
Diffstat (limited to 'arch/arm/dts/dra72-evm.dts')
| -rw-r--r-- | arch/arm/dts/dra72-evm.dts | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/arm/dts/dra72-evm.dts b/arch/arm/dts/dra72-evm.dts index 205103e..ced2f11 100644 --- a/arch/arm/dts/dra72-evm.dts +++ b/arch/arm/dts/dra72-evm.dts @@ -603,15 +603,13 @@ pinctrl-names = "default"; pinctrl-0 = <&qspi1_pins>; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; m25p80@0 { compatible = "s25fl256s1","spi-flash"; - spi-max-frequency = <48000000>; + spi-max-frequency = <64000000>; reg = <0>; spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; - spi-cpol; - spi-cpha; #address-cells = <1>; #size-cells = <1>; |