diff options
| author | Simon Glass <sjg@chromium.org> | 2015-07-03 00:15:50 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2015-08-06 03:06:11 (GMT) |
| commit | a0942a6d3e08490be2871396c977fb5520ecdf33 (patch) | |
| tree | 62ce60e4a4dfa830869c1acbce89f96450a4fd50 /arch/arm/dts/exynos5800-peach-pi.dts | |
| parent | 1a17c39c3a23f3675913fb768b6e8cbbc6ee4bd0 (diff) | |
| download | u-boot-a0942a6d3e08490be2871396c977fb5520ecdf33.tar.xz | |
exynos: dts: Support EC tunnel and main TPS65090 regulator
On pit and pi the TPS65090 regulator is connected only to the EC and we
must use a tunnel to get to it. The existing U-Boot support relies on a
special driver. Add a tunnel definition so that the new device-model
TPS65090 driver can be used unmodified.
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts/exynos5800-peach-pi.dts')
| -rw-r--r-- | arch/arm/dts/exynos5800-peach-pi.dts | 123 |
1 files changed, 100 insertions, 23 deletions
diff --git a/arch/arm/dts/exynos5800-peach-pi.dts b/arch/arm/dts/exynos5800-peach-pi.dts index 4e548f7..600c294 100644 --- a/arch/arm/dts/exynos5800-peach-pi.dts +++ b/arch/arm/dts/exynos5800-peach-pi.dts @@ -26,6 +26,7 @@ serial0 = "/serial@12C30000"; console = "/serial@12C30000"; pmic = "/i2c@12CA0000"; + i2c104 = &i2c_tunnel; }; dmc { @@ -93,29 +94,6 @@ }; }; - spi@12d40000 { /* spi2 */ - spi-max-frequency = <4000000>; - spi-deactivate-delay = <200>; - cros_ec: cros-ec@0 { - compatible = "google,cros-ec-spi"; - reg = <0>; - spi-half-duplex; - spi-max-timeout-ms = <1100>; - ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>; - - /* - * This describes the flash memory within the EC. Note - * that the STM32L flash erases to 0, not 0xff. - */ - #address-cells = <1>; - #size-cells = <1>; - flash@8000000 { - reg = <0x08000000 0x20000>; - erase-value = <0>; - }; - }; - }; - xhci@12000000 { samsung,vbus-gpio = <&gph0 0 GPIO_ACTIVE_HIGH>; }; @@ -153,4 +131,103 @@ }; }; +&spi_2 { + spi-max-frequency = <3125000>; + spi-deactivate-delay = <200>; + status = "okay"; + num-cs = <1>; + samsung,spi-src-clk = <0>; + cs-gpios = <&gpb1 2 0>; + + cros_ec: cros-ec@0 { + compatible = "google,cros-ec-spi"; + interrupt-parent = <&gpx1>; + interrupts = <5 0>; + reg = <0>; + spi-half-duplex; + spi-max-timeout-ms = <1100>; + ec-interrupt = <&gpx1 5 GPIO_ACTIVE_LOW>; + + /* + * This describes the flash memory within the EC. Note + * that the STM32L flash erases to 0, not 0xff. + */ + #address-cells = <1>; + #size-cells = <1>; + flash@8000000 { + reg = <0x08000000 0x20000>; + erase-value = <0>; + }; + + controller-data { + samsung,spi-feedback-delay = <1>; + }; + + i2c_tunnel: i2c-tunnel { + compatible = "google,cros-ec-i2c-tunnel"; + #address-cells = <1>; + #size-cells = <0>; + google,remote-bus = <0>; + + battery: sbs-battery@b { + compatible = "sbs,sbs-battery"; + reg = <0xb>; + sbs,poll-retry-count = <1>; + sbs,i2c-retry-count = <2>; + }; + + power-regulator@48 { + compatible = "ti,tps65090"; + reg = <0x48>; + + regulators { + tps65090_dcdc1: dcdc1 { + ti,enable-ext-control; + }; + tps65090_dcdc2: dcdc2 { + ti,enable-ext-control; + }; + tps65090_dcdc3: dcdc3 { + ti,enable-ext-control; + }; + tps65090_fet1: fet1 { + regulator-name = "vcd_led"; + }; + tps65090_fet2: fet2 { + regulator-name = "video_mid"; + regulator-always-on; + }; + tps65090_fet3: fet3 { + regulator-name = "wwan_r"; + regulator-always-on; + }; + tps65090_fet4: fet4 { + regulator-name = "sdcard"; + regulator-always-on; + }; + tps65090_fet5: fet5 { + regulator-name = "camout"; + regulator-always-on; + }; + tps65090_fet6: fet6 { + regulator-name = "lcd_vdd"; + }; + tps65090_fet7: fet7 { + regulator-name = "video_mid_1a"; + regulator-always-on; + }; + tps65090_ldo1: ldo1 { + }; + tps65090_ldo2: ldo2 { + }; + }; + + charger { + compatible = "ti,tps65090-charger"; + }; + }; + }; + }; +}; + #include "cros-ec-keyboard.dtsi" |