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| author | Vikas Manocha <vikas.manocha@st.com> | 2017-04-10 22:02:50 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2017-05-08 15:38:41 (GMT) |
| commit | 890bafd752460b79c607e829f58bf88f0f8484b7 (patch) | |
| tree | ab339a62abdc6747fdc74e8e689831acbd3508b9 /arch/arm/dts/stm32f746.dtsi | |
| parent | 5bf5250e9d1555aa388a810213fd85106a60388e (diff) | |
| download | u-boot-890bafd752460b79c607e829f58bf88f0f8484b7.tar.xz | |
stm32f7: use clock driver to enable qspi controller clock
Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
cc: Christophe KERELLO <christophe.kerello@st.com>
Diffstat (limited to 'arch/arm/dts/stm32f746.dtsi')
| -rw-r--r-- | arch/arm/dts/stm32f746.dtsi | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/dts/stm32f746.dtsi b/arch/arm/dts/stm32f746.dtsi index b2b0b5f..883f818 100644 --- a/arch/arm/dts/stm32f746.dtsi +++ b/arch/arm/dts/stm32f746.dtsi @@ -78,6 +78,7 @@ reg-names = "QuadSPI", "QuadSPI-memory"; interrupts = <92>; spi-max-frequency = <108000000>; + clocks = <&rcc 0 65>; status = "disabled"; }; usart1: serial@40011000 { |