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authorRajesh Bhagat <rajesh.bhagat@nxp.com>2017-08-25 06:52:39 (GMT)
committerPrabhakar Kushwaha <prabhakar.kushwaha@nxp.com>2017-08-30 09:52:30 (GMT)
commit836e9d24ad833594fca1677dbe476abb65aff60b (patch)
tree70143834c7ae4f3e822cebe0da7bde85a5c0f43c /arch/arm/dts/tegra114-dalmore.dts
parent51e5f9c51bfc679b2c236a795f0c260a6d42a00b (diff)
downloadu-boot-836e9d24ad833594fca1677dbe476abb65aff60b.tar.xz
armv8: lsch3: Add serdes and DDR voltage setup
Adds SERDES voltage and reset SERDES lanes API and makes enable/disable DDR controller support 0.9V API common. Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Rajesh Bhagat <rajesh.bhagat@nxp.com>
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