ARM: dts: uniphier: sync DT with latest Linux

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

1 files changed, 0 insertions, 325 deletions

diff --git a/arch/arm/dts/uniphier-ph1-sld8.dtsi b/arch/arm/dts/uniphier-ph1-sld8.dtsi
deleted file mode 100644
index 1ecce50..0000000
--- a/arch/arm/dts/uniphier-ph1-sld8.dtsi
+++ /dev/null
@@ -1,325 +0,0 @@
-/*
- * Device Tree Source for UniPhier PH1-sLD8 SoC
- *
- * Copyright (C) 2014-2015 Masahiro Yamada <yamada.masahiro@socionext.com>
- *
- * SPDX-License-Identifier:	GPL-2.0+	X11
- */
-
-/include/ "uniphier-common32.dtsi"
-
-/ {
-	compatible = "socionext,ph1-sld8";
-
-	cpus {
-		#address-cells = <1>;
-		#size-cells = <0>;
-
-		cpu@0 {
-			device_type = "cpu";
-			compatible = "arm,cortex-a9";
-			reg = <0>;
-			next-level-cache = <&l2>;
-		};
-	};
-
-	clocks {
-		arm_timer_clk: arm_timer_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <50000000>;
-		};
-
-		iobus_clk: iobus_clk {
-			#clock-cells = <0>;
-			compatible = "fixed-clock";
-			clock-frequency = <100000000>;
-		};
-	};
-};
-
-&soc {
-	l2: l2-cache@500c0000 {
-		compatible = "socionext,uniphier-system-cache";
-		reg = <0x500c0000 0x2000>, <0x503c0100 0x4>, <0x506c0000 0x400>;
-		interrupts = <0 174 4>, <0 175 4>;
-		cache-unified;
-		cache-size = <(256 * 1024)>;
-		cache-sets = <256>;
-		cache-line-size = <128>;
-		cache-level = <2>;
-	};
-
-	port0x: gpio@55000008 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000008 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port1x: gpio@55000010 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000010 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port2x: gpio@55000018 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000018 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port3x: gpio@55000020 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000020 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port4: gpio@55000028 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000028 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port5x: gpio@55000030 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000030 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port6x: gpio@55000038 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000038 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port7x: gpio@55000040 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000040 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port8x: gpio@55000048 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000048 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port9x: gpio@55000050 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000050 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port10x: gpio@55000058 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000058 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port11x: gpio@55000060 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000060 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port12x: gpio@55000068 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000068 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port13x: gpio@55000070 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000070 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port14x: gpio@55000078 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000078 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	port16x: gpio@55000088 {
-		compatible = "socionext,uniphier-gpio";
-		reg = <0x55000088 0x8>;
-		gpio-controller;
-		#gpio-cells = <2>;
-	};
-
-	i2c0: i2c@58400000 {
-		compatible = "socionext,uniphier-i2c";
-		status = "disabled";
-		reg = <0x58400000 0x40>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		interrupts = <0 41 1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c0>;
-		clocks = <&iobus_clk>;
-		clock-frequency = <100000>;
-	};
-
-	i2c1: i2c@58480000 {
-		compatible = "socionext,uniphier-i2c";
-		status = "disabled";
-		reg = <0x58480000 0x40>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		interrupts = <0 42 1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c1>;
-		clocks = <&iobus_clk>;
-		clock-frequency = <100000>;
-	};
-
-	/* chip-internal connection for DMD */
-	i2c2: i2c@58500000 {
-		compatible = "socionext,uniphier-i2c";
-		reg = <0x58500000 0x40>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		interrupts = <0 43 1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c2>;
-		clocks = <&iobus_clk>;
-		clock-frequency = <400000>;
-	};
-
-	i2c3: i2c@58580000 {
-		compatible = "socionext,uniphier-i2c";
-		status = "disabled";
-		reg = <0x58580000 0x40>;
-		#address-cells = <1>;
-		#size-cells = <0>;
-		interrupts = <0 44 1>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_i2c3>;
-		clocks = <&iobus_clk>;
-		clock-frequency = <100000>;
-	};
-
-	sd: sdhc@5a400000 {
-		compatible = "socionext,uniphier-sdhc";
-		status = "disabled";
-		reg = <0x5a400000 0x200>;
-		interrupts = <0 76 4>;
-		pinctrl-names = "default", "1.8v";
-		pinctrl-0 = <&pinctrl_sd>;
-		pinctrl-1 = <&pinctrl_sd_1v8>;
-		clocks = <&mio_clk 0>;
-		bus-width = <4>;
-	};
-
-	emmc: sdhc@5a500000 {
-		compatible = "socionext,uniphier-sdhc";
-		status = "disabled";
-		interrupts = <0 78 4>;
-		reg = <0x5a500000 0x200>;
-		pinctrl-names = "default", "1.8v";
-		pinctrl-0 = <&pinctrl_emmc>;
-		pinctrl-1 = <&pinctrl_emmc_1v8>;
-		clocks = <&mio_clk 1>;
-		bus-width = <8>;
-		non-removable;
-	};
-
-	usb0: usb@5a800100 {
-		compatible = "socionext,uniphier-ehci", "generic-ehci";
-		status = "disabled";
-		reg = <0x5a800100 0x100>;
-		interrupts = <0 80 4>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usb0>;
-		clocks = <&mio_clk 3>, <&mio_clk 6>;
-	};
-
-	usb1: usb@5a810100 {
-		compatible = "socionext,uniphier-ehci", "generic-ehci";
-		status = "disabled";
-		reg = <0x5a810100 0x100>;
-		interrupts = <0 81 4>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usb1>;
-		clocks = <&mio_clk 4>, <&mio_clk 6>;
-	};
-
-	usb2: usb@5a820100 {
-		compatible = "socionext,uniphier-ehci", "generic-ehci";
-		status = "disabled";
-		reg = <0x5a820100 0x100>;
-		interrupts = <0 82 4>;
-		pinctrl-names = "default";
-		pinctrl-0 = <&pinctrl_usb2>;
-		clocks = <&mio_clk 5>, <&mio_clk 6>;
-	};
-
-	aidet@61830000 {
-		compatible = "simple-mfd", "syscon";
-		reg = <0x61830000 0x200>;
-	};
-};
-
-&refclk {
-	clock-frequency = <25000000>;
-};
-
-&serial0 {
-	clock-frequency = <80000000>;
-};
-
-&serial1 {
-	clock-frequency = <80000000>;
-};
-
-&serial2 {
-	clock-frequency = <80000000>;
-};
-
-&serial3 {
-	interrupts = <0 29 4>;
-	clock-frequency = <80000000>;
-};
-
-&mio_clk {
-	compatible = "socionext,uniphier-sld8-mio-clock";
-};
-
-&mio_rst {
-	compatible = "socionext,uniphier-sld8-mio-reset";
-};
-
-&peri_clk {
-	compatible = "socionext,uniphier-sld8-peri-clock";
-};
-
-&peri_rst {
-	compatible = "socionext,uniphier-sld8-peri-reset";
-};
-
-&pinctrl {
-	compatible = "socionext,uniphier-sld8-pinctrl";
-};
-
-&sys_clk {
-	compatible = "socionext,uniphier-sld8-clock";
-};
-
-&sys_rst {
-	compatible = "socionext,uniphier-sld8-reset";
-};