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author | Tom Rini <trini@konsulko.com> | 2015-07-28 15:31:21 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2015-07-28 15:31:21 (GMT) |
commit | 66d10c18bf2c34698362b6fe1891bcc6e8755243 (patch) | |
tree | e645a386e4de9330d2d7793bc90631416caa8bea /arch/arm/dts/zynq-zc770-xm010.dts | |
parent | 0a0db402d1c9c93a91e2e229eea2e3f547d6148b (diff) | |
parent | 711e5e26b41457e658155e7c225c9ccfed0182ef (diff) | |
download | u-boot-66d10c18bf2c34698362b6fe1891bcc6e8755243.tar.xz |
Merge branch 'zynq' of git://www.denx.de/git/u-boot-microblaze
Diffstat (limited to 'arch/arm/dts/zynq-zc770-xm010.dts')
-rw-r--r-- | arch/arm/dts/zynq-zc770-xm010.dts | 75 |
1 files changed, 70 insertions, 5 deletions
diff --git a/arch/arm/dts/zynq-zc770-xm010.dts b/arch/arm/dts/zynq-zc770-xm010.dts index bf107e3..da3a182 100644 --- a/arch/arm/dts/zynq-zc770-xm010.dts +++ b/arch/arm/dts/zynq-zc770-xm010.dts @@ -1,7 +1,7 @@ /* * Xilinx ZC770 XM010 board DTS * - * Copyright (C) 2013 Xilinx, Inc. + * Copyright (C) 2013 - 2015 Xilinx, Inc. * * SPDX-License-Identifier: GPL-2.0+ */ @@ -9,20 +9,85 @@ #include "zynq-7000.dtsi" / { - model = "Zynq ZC770 XM010 Board"; compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000"; + model = "Xilinx Zynq"; aliases { + ethernet0 = &gem0; + i2c0 = &i2c0; serial0 = &uart1; - spi1 = &spi1; + spi0 = &spi1; }; - memory { + chosen { + bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk"; + linux,stdout-path = &uart1; + stdout-path = &uart1; + }; + + memory@0 { device_type = "memory"; - reg = <0 0x40000000>; + reg = <0x0 0x40000000>; + }; + + usb_phy0: phy0 { + compatible = "usb-nop-xceiv"; + #phy-cells = <0>; }; }; &spi1 { status = "okay"; + num-cs = <4>; + is-decoded-cs = <0>; + flash@0 { + compatible = "sst25wf080"; + reg = <1>; + spi-max-frequency = <1000000>; + #address-cells = <1>; + #size-cells = <1>; + partition@test { + label = "spi-flash"; + reg = <0x0 0x100000>; + }; + }; +}; + +&can0 { + status = "okay"; +}; + +&gem0 { + status = "okay"; + phy-mode = "rgmii-id"; + phy-handle = <ðernet_phy>; + + ethernet_phy: ethernet-phy@7 { + reg = <7>; + }; +}; + +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + + m24c02_eeprom@52 { + compatible = "at,24c02"; + reg = <0x52>; + }; + +}; + +&sdhci0 { + status = "okay"; +}; + +&uart1 { + status = "okay"; +}; + +&usb0 { + status = "okay"; + dr_mode = "host"; + usb-phy = <&usb_phy0>; }; |