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author | Marek Vasut <marex@denx.de> | 2015-07-27 20:34:54 (GMT) |
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committer | Marek Vasut <marex@denx.de> | 2015-08-08 12:14:04 (GMT) |
commit | bfa89d2ba8f0a278df6de584dcfbd33814753e33 (patch) | |
tree | ea240198443d00cd6814d24a77e2aa7d6ddbf680 /arch/arm/dts | |
parent | ae27120c31d58b8bb694d9155bcffdcfae8552a6 (diff) | |
download | u-boot-bfa89d2ba8f0a278df6de584dcfbd33814753e33.tar.xz |
arm: socfpga: Fix FPGA bitstream programming routine
In case the FPGA bitstream is aligned to 4 bytes, skip the
part of the assembler which handles unaligned bitstream.
Otherwise, that part will loop indefinitelly.
Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Dinh Nguyen <dinguyen@opensource.altera.com>
Diffstat (limited to 'arch/arm/dts')
0 files changed, 0 insertions, 0 deletions