diff options
| author | eric.gao@rock-chips.com <eric.gao@rock-chips.com> | 2017-04-10 02:41:46 (GMT) |
|---|---|---|
| committer | Simon Glass <sjg@chromium.org> | 2017-04-15 16:13:17 (GMT) |
| commit | d3cf9eb2d87c8961408ec5aa6ebe0c54f2c13724 (patch) | |
| tree | 9aabab373a868e362fd15ee1db0ce29c53ee67f4 /arch/arm/dts | |
| parent | b644354a7c255defe0086c15ccb6b298f27a8bcf (diff) | |
| download | u-boot-d3cf9eb2d87c8961408ec5aa6ebe0c54f2c13724.tar.xz | |
rockchip: pmic: Enable RK808 for rk3399 evb
For using mipi display, we need to enable lcd3v3
which supplied by rk808,so enable rk808 first.
Signed-off-by: Eric Gao <eric.gao@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/dts')
| -rw-r--r-- | arch/arm/dts/rk3399-evb.dts | 39 |
1 files changed, 39 insertions, 0 deletions
diff --git a/arch/arm/dts/rk3399-evb.dts b/arch/arm/dts/rk3399-evb.dts index c3a7ca2..e1f867b 100644 --- a/arch/arm/dts/rk3399-evb.dts +++ b/arch/arm/dts/rk3399-evb.dts @@ -30,6 +30,13 @@ status = "okay"; }; + vccsys: vccsys { + compatible = "regulator-fixed"; + regulator-name = "vccsys"; + regulator-boot-on; + regulator-always-on; + }; + vcc3v3_sys: vcc3v3-sys { compatible = "regulator-fixed"; regulator-name = "vcc3v3_sys"; @@ -51,6 +58,7 @@ regulator-name = "vcc5v0_host"; gpio = <&gpio4 25 GPIO_ACTIVE_HIGH>; }; + }; &emmc_phy { @@ -112,6 +120,37 @@ status = "okay"; }; +&i2c0 { + status = "okay"; + clock-frequency = <400000>; + i2c-scl-falling-time-ns = <50>; + i2c-scl-rising-time-ns = <100>; + u-boot,dm-pre-reloc; + + rk808: pmic@1b { + compatible = "rockchip,rk808"; + clock-output-names = "xin32k", "wifibt_32kin"; + interrupt-parent = <&gpio0>; + interrupts = <4 IRQ_TYPE_LEVEL_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + reg = <0x1b>; + rockchip,system-power-controller; + #clock-cells = <1>; + u-boot,dm-pre-reloc; + status = "okay"; + + vcc12-supply = <&vcc3v3_sys>; + regulators { + vcc33_lcd: SWITCH_REG2 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vcc33_lcd"; + }; + }; + }; +}; + &pinctrl { pmic { pmic_int_l: pmic-int-l { |