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authorLokesh Vutla <lokeshvutla@ti.com>2016-05-16 06:17:25 (GMT)
committerTom Rini <trini@konsulko.com>2016-05-27 19:47:52 (GMT)
commit3164f3c68941a1665090bca903d56754ac36f89d (patch)
tree17b322f9953415fbb1d8f6ffba2363d087655f6a /arch/arm/include/asm/arch-am33xx
parentd8ff4fdb103a7964a3351c0b26b256e8ba53319e (diff)
downloadu-boot-3164f3c68941a1665090bca903d56754ac36f89d.tar.xz
ARM: AM33xx: Add support for Clock Synthesizer
The CDCE913 and CDCEL913 devices are modular PLL-based, low cost, high performance , programmable clock synthesizers. They generate upto 3 output clocks from a single input frequency. Each output can be programmed for any clock-frequency. Adding support for the same. Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-am33xx')
-rw-r--r--arch/arm/include/asm/arch-am33xx/clk_synthesizer.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
new file mode 100644
index 0000000..a5af012
--- /dev/null
+++ b/arch/arm/include/asm/arch-am33xx/clk_synthesizer.h
@@ -0,0 +1,43 @@
+/*
+ * clk-synthesizer.h
+ *
+ * Clock synthesizer header
+ *
+ * Copyright (C) 2016, Texas Instruments, Incorporated - http://www.ti.com/
+ *
+ * SPDX-License-Identifier: GPL-2.0+
+ */
+
+#ifndef __CLK_SYNTHESIZER_H
+#define __CLK_SYNTHESIZER_H
+
+#include <common.h>
+
+#define CLK_SYNTHESIZER_ID_REG 0x0
+#define CLK_SYNTHESIZER_XCSEL 0x05
+#define CLK_SYNTHESIZER_MUX_REG 0x14
+#define CLK_SYNTHESIZER_PDIV2_REG 0x16
+#define CLK_SYNTHESIZER_PDIV3_REG 0x17
+
+#define CLK_SYNTHESIZER_BYTE_MODE 0x80
+
+/**
+ * struct clk_synth: This structure holds data neeed for configuring
+ * for clock synthesizer.
+ * @id: The id of synthesizer
+ * @capacitor: value of the capacitor attached
+ * @mux: mux settings.
+ * @pdiv2: Div to be applied to second output
+ * @pdiv3: Div to be applied to third output
+ */
+struct clk_synth {
+ u32 id;
+ u32 capacitor;
+ u32 mux;
+ u32 pdiv2;
+ u32 pdiv3;
+};
+
+int setup_clock_synthesizer(struct clk_synth *data);
+
+#endif