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author | Yuantian Tang <andy.tang@nxp.com> | 2017-04-19 05:27:39 (GMT) |
---|---|---|
committer | York Sun <york.sun@nxp.com> | 2017-04-24 16:07:12 (GMT) |
commit | 026f30ec3e846edb85b5df8265d8cad098184be6 (patch) | |
tree | dd04857c18d73ef4ed0fc809c72cfe4ab8d2f101 /arch/arm/include/asm/arch-fsl-layerscape | |
parent | d14428c729fb620da73234f5a8862066454de44c (diff) | |
download | u-boot-026f30ec3e846edb85b5df8265d8cad098184be6.tar.xz |
arm: psci: make psci usable on single core socs
PSCI can be used on both multiple and single core socs. Current
implementation only allows PSCI to work on multiple core socs.
This patch removes this restriction so that PSCI can work on
single core socs as well.
Signed-off-by: Chenhui Zhao <chenhui.zhao@nxp.com>
Signed-off-by: Tang Yuantian <andy.tang@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm/arch-fsl-layerscape')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/mp.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h index d0832b5..fd3f851 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h @@ -31,7 +31,11 @@ extern u64 __spin_table[]; extern u64 __real_cntfrq; extern u64 *secondary_boot_code; extern size_t __secondary_boot_code_size; +#ifdef CONFIG_MP int fsl_layerscape_wake_seconday_cores(void); +#else +static inline int fsl_layerscape_wake_seconday_cores(void) { return 0; } +#endif void *get_spin_tbl_addr(void); phys_addr_t determine_mp_bootpg(void); void secondary_boot_func(void); |