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author | Benoît Thébaudeau <benoit.thebaudeau@advansee.com> | 2013-04-23 10:17:38 (GMT) |
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committer | Stefano Babic <sbabic@denx.de> | 2013-04-28 09:07:40 (GMT) |
commit | 8f3ff11c1f82e51e3f4c1f7c32b88693046dc318 (patch) | |
tree | 08cae79ce911bf66f838fc1c7bdf98df46d21c34 /arch/arm/include/asm/arch-mx6/imx-regs.h | |
parent | cdc203682fcfcc53486cc68edbcf14e33b13ed27 (diff) | |
download | u-boot-8f3ff11c1f82e51e3f4c1f7c32b88693046dc318.tar.xz |
imx: Homogenize and fix fuse register definitions
IIM:
- Homogenize prg_p naming (the reference manuals are not always self-consistent
for that).
- Add missing SCSx and bank registers.
- Fix the number of banks on i.MX53.
OCOTP:
- Rename iim to ocotp in order to avoid confusion.
- Rename fuse_data to read_fuse_data, and sticky to sw_sticky, according to the
reference manual.
- Merge the existing spinoff gp1 fuse definition on i.MX6.
- Fix the number of banks on i.MX6.
Signed-off-by: Benoît Thébaudeau <benoit.thebaudeau@advansee.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-mx6/imx-regs.h')
-rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 19 |
1 files changed, 7 insertions, 12 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index 0e4d8fa..680e752 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -229,7 +229,6 @@ #define CHIP_REV_1_0 0x10 #define IRAM_SIZE 0x00040000 -#define IMX_IIM_BASE OCOTP_BASE_ADDR #define FEC_QUIRK_ENET_MAC #if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__)) @@ -258,12 +257,6 @@ struct src { u32 gpr10; }; -/* OCOTP Registers */ -struct ocotp_regs { - u32 reserved[0x198]; - u32 gp1; /* 0x660 */ -}; - /* GPR3 bitfields */ #define IOMUXC_GPR3_GPU_DBG_OFFSET 29 #define IOMUXC_GPR3_GPU_DBG_MASK (3<<IOMUXC_GPR3_GPU_DBG_OFFSET) @@ -438,7 +431,7 @@ struct cspi_regs { ECSPI5_BASE_ADDR #endif -struct iim_regs { +struct ocotp_regs { u32 ctrl; u32 ctrl_set; u32 ctrl_clr; @@ -449,9 +442,9 @@ struct iim_regs { u32 rsvd1[3]; u32 read_ctrl; u32 rsvd2[3]; - u32 fuse_data; + u32 read_fuse_data; u32 rsvd3[3]; - u32 sticky; + u32 sw_sticky; u32 rsvd4[3]; u32 scs; u32 scs_set; @@ -466,7 +459,7 @@ struct iim_regs { struct fuse_bank { u32 fuse_regs[0x20]; - } bank[15]; + } bank[16]; }; struct fuse_bank4_regs { @@ -477,7 +470,9 @@ struct fuse_bank4_regs { u32 mac_addr_low; u32 rsvd2[3]; u32 mac_addr_high; - u32 rsvd3[0x13]; + u32 rsvd3[0xb]; + u32 gp1; + u32 rsvd4[7]; }; struct aipstz_regs { |