diff options
| author | Fabio Estevam <fabio.estevam@freescale.com> | 2014-01-29 19:39:49 (GMT) |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2014-02-11 10:24:12 (GMT) |
| commit | 6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2 (patch) | |
| tree | 6e1b31648037762e47c487b94a271c14789d5c69 /arch/arm/include/asm/arch-mx6 | |
| parent | 4702c62dce3e2e2648ae3c8d002202211de8c92a (diff) | |
| download | u-boot-6d73c23410cd0f8a54227dd0361fb8b9eadcb4b2.tar.xz | |
mx6: Enable L2 cache support
Add L2 cache support and enable it by default.
Configure the L2 cache in the same way as done by FSL kernel:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mach-mx6/mm.c?h=imx_3.0.35_4.1.0
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Acked-by: Dirk Behme <dirk.behme@gmail.com>
Acked-by: Stefano Babic <sbabic@denx.de>
Diffstat (limited to 'arch/arm/include/asm/arch-mx6')
| -rw-r--r-- | arch/arm/include/asm/arch-mx6/imx-regs.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-mx6/imx-regs.h b/arch/arm/include/asm/arch-mx6/imx-regs.h index f2ad6e9..c2d210a 100644 --- a/arch/arm/include/asm/arch-mx6/imx-regs.h +++ b/arch/arm/include/asm/arch-mx6/imx-regs.h @@ -53,6 +53,7 @@ #define GLOBAL_TIMER_BASE_ADDR 0x00A00200 #define PRIVATE_TIMERS_WD_BASE_ADDR 0x00A00600 #define IC_DISTRIBUTOR_BASE_ADDR 0x00A01000 +#define L2_PL310_BASE 0x00A02000 #define GPV0_BASE_ADDR 0x00B00000 #define GPV1_BASE_ADDR 0x00C00000 #define PCIE_ARB_BASE_ADDR 0x01000000 |