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authorAneesh V <aneesh@ti.com>2011-06-16 23:30:53 (GMT)
committerAlbert ARIBAUD <albert.u.boot@aribaud.net>2011-07-04 08:55:25 (GMT)
commit45bf05854bc94ed8bae9e9114292895b990327ea (patch)
tree1bc119e00d0dd4a58b36df51cc07768a950352a0 /arch/arm/include/asm/arch-omap3/sys_proto.h
parent8b457fa828971ac036b15e98e65d99b6354c5496 (diff)
downloadu-boot-45bf05854bc94ed8bae9e9114292895b990327ea.tar.xz
armv7: adapt omap3 to the new cache maintenance framework
adapt omap3 to the new layered cache maintenance framework Signed-off-by: Aneesh V <aneesh@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap3/sys_proto.h')
-rw-r--r--arch/arm/include/asm/arch-omap3/sys_proto.h10
1 files changed, 7 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 4a28ba1..995e7cb 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -27,6 +27,11 @@ typedef struct {
char *nand_string;
} omap3_sysinfo;
+struct emu_hal_params {
+ u32 num_params;
+ u32 param1;
+};
+
void prcm_init(void);
void per_clocks_enable(void);
@@ -53,9 +58,7 @@ u32 is_running_in_sdram(void);
u32 is_running_in_sram(void);
u32 is_running_in_flash(void);
u32 get_device_type(void);
-void l2cache_enable(void);
void secureworld_exit(void);
-void setup_auxcr(void);
void try_unlock_memory(void);
u32 get_boot_type(void);
void invalidate_dcache(u32);
@@ -66,5 +69,6 @@ void make_cs1_contiguous(void);
void omap_nand_switch_ecc(int);
void power_init_r(void);
void dieid_num_r(void);
-
+void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
+void omap3_gp_romcode_call(u32 service_id, u32 parameter);
#endif