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author | Tom Rini <trini@ti.com> | 2011-11-18 12:48:07 (GMT) |
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committer | Albert ARIBAUD <albert.u.boot@aribaud.net> | 2011-12-06 22:59:38 (GMT) |
commit | 4e647e12074c11a5bcfc5291c44c3b52531795fa (patch) | |
tree | d9ad7815affc5e3d4c7987e8a1a94c343070858b /arch/arm/include/asm/arch-omap3/sys_proto.h | |
parent | 9ae0d550741db45e933dc73e7135d1861e3a9b62 (diff) | |
download | u-boot-4e647e12074c11a5bcfc5291c44c3b52531795fa.tar.xz |
OMAP3 SPL: Add identify_nand_chip function
A number of boards are populated with a PoP chip for both DDR and NAND
memory. Other boards may simply use this as an easy way to identify
board revs. So we provide a function that can be called early to reset
the NAND chip and return the result of NAND_CMD_READID. All of this
code is put into spl_id_nand.c and controlled via CONFIG_SPL_OMAP3_ID_NAND.
Signed-off-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap3/sys_proto.h')
-rw-r--r-- | arch/arm/include/asm/arch-omap3/sys_proto.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h index 80e167b..e5031d5 100644 --- a/arch/arm/include/asm/arch-omap3/sys_proto.h +++ b/arch/arm/include/asm/arch-omap3/sys_proto.h @@ -40,6 +40,7 @@ void sdrc_init(void); void do_sdrc_init(u32, u32); void get_board_mem_timings(u32 *mcfg, u32 *ctrla, u32 *ctrlb, u32 *rfr_ctrl, u32 *mr); +void identify_nand_chip(int *mfr, int *id); void emif4_init(void); void gpmc_init(void); void enable_gpmc_cs_config(const u32 *gpmc_config, struct gpmc_cs *cs, u32 base, |