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| author | Ravi Babu <ravibabu@ti.com> | 2016-03-15 23:09:14 (GMT) |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2016-03-27 13:12:14 (GMT) |
| commit | 6b1c14bb67b261be3b4045e8ce124314a2720ec5 (patch) | |
| tree | a6437c10a20ac1e0bfef9ef24e8af6e5953ab398 /arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h | |
| parent | 9c90f5135e25a4f9bea5862fd22372b037c80600 (diff) | |
| download | u-boot-6b1c14bb67b261be3b4045e8ce124314a2720ec5.tar.xz | |
board: ti: DRA72: revC evm: Update sdram timing configuration for SR2.0
DDR configuration has changes from SR1.1 based Rev-A/B version of evm
to the SR2.0 based Rev C of the EVM. Rev C evm now uses the higher
density MT41K512M8RH-125-AAT:E (IT) which is of size 2GB.
Update the DDR configuration based on data from EMIF configuration
tool 1.1.1. NOTE: we use eeprom information (ram_size) to update the
configuration.
Tested-by: Vishal Mahaveer <vishalm@ti.com>
Signed-off-by: Ravi Babu <ravibabu@ti.com>
Signed-off-by: Nishanth Menon <nm@ti.com>
Reviewed-by: Tom Rini <trini@konsulko.com>
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/dra7xx_iodelay.h')
0 files changed, 0 insertions, 0 deletions