diff options
author | Simon Glass <sjg@chromium.org> | 2016-01-22 02:45:17 (GMT) |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2016-01-22 03:42:37 (GMT) |
commit | dae594f2105b08ce76aa6b3b02433abb0796be51 (patch) | |
tree | b4245d9043e7cadd9df635c7807ed6dcb3df3240 /arch/arm/include/asm/arch-rockchip/cru_rk3288.h | |
parent | 318922b30fd0f255a72d7ccd7d7fd58dfb5feb2e (diff) | |
download | u-boot-dae594f2105b08ce76aa6b3b02433abb0796be51.tar.xz |
rockchip: spl: Support full-speed CPU in SPL
Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Signed-off-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include/asm/arch-rockchip/cru_rk3288.h')
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/cru_rk3288.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h index b0dea70..d2690c7 100644 --- a/arch/arm/include/asm/arch-rockchip/cru_rk3288.h +++ b/arch/arm/include/asm/arch-rockchip/cru_rk3288.h @@ -109,6 +109,18 @@ enum { SPI0_DIV_MASK = 0x7f, }; +/* CRU_CLKSEL37_CON */ +enum { + PCLK_CORE_DBG_DIV_SHIFT = 9, + PCLK_CORE_DBG_DIV_MASK = 0x1f, + + ATCLK_CORE_DIV_CON_SHIFT = 4, + ATCLK_CORE_DIV_CON_MASK = 0x1f, + + CLK_L2RAM_DIV_SHIFT = 0, + CLK_L2RAM_DIV_MASK = 7, +}; + /* CRU_CLKSEL39_CON */ enum { ACLK_HEVC_PLL_SHIFT = 0xe, |