diff options
author | Heiko Stübner <heiko@sntech.de> | 2017-02-18 18:46:37 (GMT) |
---|---|---|
committer | Simon Glass <sjg@chromium.org> | 2017-03-16 22:03:45 (GMT) |
commit | 3e747197b19c6a567408c57701eeb05e8694474b (patch) | |
tree | 900c551a45edf7461eef854b18cbf1d90a7e4351 /arch/arm/include/asm/arch-rockchip | |
parent | 0a2be69fbf5e78e0174033f9bb27926a70cca9de (diff) | |
download | u-boot-3e747197b19c6a567408c57701eeb05e8694474b.tar.xz |
rockchip: rk3188: Add sdram driver
The sdram controller blocks are very similar to the rk3288 in utilizing
memory scheduler, Designware uPCTL and Designware PUBL blocks, only
limited to one bank instead of two.
There are some minimal differences when setting up the ram, so it gets
a separate driver for the rk3188 but reuses the driver structs, as there
is no need to define the same again.
More optimization can happen when the modelling of the controller parts
in the dts actually follow the hardware layout hopefully at some point
in the future.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/include/asm/arch-rockchip')
-rw-r--r-- | arch/arm/include/asm/arch-rockchip/ddr_rk3188.h | 25 |
1 files changed, 25 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/ddr_rk3188.h b/arch/arm/include/asm/arch-rockchip/ddr_rk3188.h new file mode 100644 index 0000000..3d7929f --- /dev/null +++ b/arch/arm/include/asm/arch-rockchip/ddr_rk3188.h @@ -0,0 +1,25 @@ +/* + * (C) Copyright 2015 Google, Inc + * + * SPDX-License-Identifier: GPL-2.0 + */ + +#ifndef _ASM_ARCH_DDR_RK3188_H +#define _ASM_ARCH_DDR_RK3188_H + +#include <asm/arch/ddr_rk3288.h> + +/* + * RK3188 Memory scheduler register map. + */ +struct rk3188_msch { + u32 coreid; + u32 revisionid; + u32 ddrconf; + u32 ddrtiming; + u32 ddrmode; + u32 readlatency; +}; +check_member(rk3188_msch, readlatency, 0x0014); + +#endif |