summaryrefslogtreecommitdiff
path: root/arch/arm/include/asm/arch-tegra
diff options
context:
space:
mode:
authorBryan Wu <pengw@nvidia.com>2014-06-24 02:45:29 (GMT)
committerTom Warren <twarren@nvidia.com>2014-08-18 23:57:02 (GMT)
commitdf3443dfa449ad02bef8ddf6e2c90a6fd9394fc9 (patch)
tree208df055da17bf359f611abf18def134fb2c9a7b /arch/arm/include/asm/arch-tegra
parent1899fac925eda817e12234aef3d01d354788662e (diff)
downloadu-boot-df3443dfa449ad02bef8ddf6e2c90a6fd9394fc9.tar.xz
ARM: tegra: Disable VPR
On Tegra114 and Tegra124 platforms, certain display-related registers cannot be accessed unless the VPR registers are programmed. For bootloader, we probably don't care about VPR, so we disable it (which counts as programming it, and allows those display-related registers to be accessed). This patch is based on the commit 5f499646c83ba08079f3fdff6591f638a0ce4c0c in Chromium OS U-Boot project. Signed-off-by: Andrew Chew <achew@nvidia.com> Signed-off-by: Jimmy Zhang <jimmzhang@nvidia.com> Signed-off-by: Bryan Wu <pengw@nvidia.com> [acourbot: ensure write went through, vpr.c style changes] Signed-off-by: Alexandre Courbot <acourbot@nvidia.com> Reviewed-by: Stephen Warren <swarren@nvidia.com> Cc: Tom Warren <TWarren@nvidia.com> Cc: Stephen Warren <swarren@nvidia.com> Cc: Terje Bergstrom <tbergstrom@nvidia.com> Tested-by: Thierry Reding <treding@nvidia.com> Signed-off-by: Tom Warren <twarren@nvidia.com>
Diffstat (limited to 'arch/arm/include/asm/arch-tegra')
-rw-r--r--arch/arm/include/asm/arch-tegra/ap.h9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-tegra/ap.h b/arch/arm/include/asm/arch-tegra/ap.h
index bc5851c..5c8be94 100644
--- a/arch/arm/include/asm/arch-tegra/ap.h
+++ b/arch/arm/include/asm/arch-tegra/ap.h
@@ -65,3 +65,12 @@ int tegra_get_sku_info(void);
/* Do any chip-specific cache config */
void config_cache(void);
+
+#if defined(CONFIG_TEGRA124)
+/* Do chip-specific vpr config */
+void config_vpr(void);
+#else
+static inline void config_vpr(void)
+{
+}
+#endif