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author | Tom Rini <trini@konsulko.com> | 2016-03-29 16:58:45 (GMT) |
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committer | Tom Rini <trini@konsulko.com> | 2016-03-29 16:58:45 (GMT) |
commit | 0badc648dcb0d0e10db959ffe8ab1b1e156b3724 (patch) | |
tree | e87af07b01d2d2a09169e3dc3f881db97be98751 /arch/arm/include/asm/fsl_secure_boot.h | |
parent | 32b9b556f7ca198e62646662e3260f8ef352094f (diff) | |
parent | ed2530d0963196a7175058ed9b5e6cbc29822f7f (diff) | |
download | u-boot-0badc648dcb0d0e10db959ffe8ab1b1e156b3724.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq
Diffstat (limited to 'arch/arm/include/asm/fsl_secure_boot.h')
-rw-r--r-- | arch/arm/include/asm/fsl_secure_boot.h | 50 |
1 files changed, 46 insertions, 4 deletions
diff --git a/arch/arm/include/asm/fsl_secure_boot.h b/arch/arm/include/asm/fsl_secure_boot.h index a32a1d7..d576f2e 100644 --- a/arch/arm/include/asm/fsl_secure_boot.h +++ b/arch/arm/include/asm/fsl_secure_boot.h @@ -18,7 +18,9 @@ #ifdef CONFIG_CHAIN_OF_TRUST #define CONFIG_CMD_ESBC_VALIDATE #define CONFIG_CMD_BLOB +#define CONFIG_CMD_HASH #define CONFIG_FSL_SEC_MON +#define CONFIG_SHA_HW_ACCEL #define CONFIG_SHA_PROG_HW_ACCEL #define CONFIG_RSA_FREESCALE_EXP @@ -35,21 +37,61 @@ * The feature is only applicable in case of NOR boot and is * not applicable in case of RAMBOOT (NAND, SD, SPI). */ +#ifndef CONFIG_ESBC_HDR_LS +/* Current Key EXT feature not available in LS ESBC Header */ #define CONFIG_FSL_ISBC_KEY_EXT #endif -#ifdef CONFIG_LS1043A -/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit */ +#endif + +#if defined(CONFIG_LS1043A) || defined(CONFIG_LS2080A) ||\ + defined(CONFIG_LS2085A) +/* For LS1043 (ARMv8), ESBC image Address in Header is 64 bit + * Similiarly for LS2080 and LS2085 + */ #define CONFIG_ESBC_ADDR_64BIT #endif +#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) +#define CONFIG_EXTRA_ENV \ + "setenv fdt_high 0xa0000000;" \ + "setenv initrd_high 0xcfffffff;" \ + "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" +#else #define CONFIG_EXTRA_ENV \ "setenv fdt_high 0xcfffffff;" \ "setenv initrd_high 0xcfffffff;" \ "setenv hwconfig \'fsl_ddr:ctlr_intlv=null,bank_intlv=null\';" +#endif -/* The address needs to be modified according to NOR memory map */ -#define CONFIG_BOOTSCRIPT_HDR_ADDR 0x600a0000 +/* Copying Bootscript and Header to DDR from NOR for LS2 and for rest, from + * Non-XIP Memory (Nand/SD)*/ +#if defined(CONFIG_SYS_RAMBOOT) || defined(CONFIG_LS2080A) ||\ + defined(CONFIG_LS2085A) +#define CONFIG_BOOTSCRIPT_COPY_RAM +#endif +/* The address needs to be modified according to NOR and DDR memory map */ +#if defined(CONFIG_LS2080A) || defined(CONFIG_LS2085A) +#define CONFIG_BS_HDR_ADDR_FLASH 0x583920000 +#define CONFIG_BS_ADDR_FLASH 0x583900000 +#define CONFIG_BS_HDR_ADDR_RAM 0xa3920000 +#define CONFIG_BS_ADDR_RAM 0xa3900000 +#else +#define CONFIG_BS_HDR_ADDR_FLASH 0x600a0000 +#define CONFIG_BS_ADDR_FLASH 0x60060000 +#define CONFIG_BS_HDR_ADDR_RAM 0xa0060000 +#define CONFIG_BS_ADDR_RAM 0xa0060000 +#endif + +#ifdef CONFIG_BOOTSCRIPT_COPY_RAM +#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_RAM +#define CONFIG_BS_HDR_SIZE 0x00002000 +#define CONFIG_BOOTSCRIPT_ADDR CONFIG_BS_ADDR_RAM +#define CONFIG_BS_SIZE 0x00001000 +#else +#define CONFIG_BOOTSCRIPT_HDR_ADDR CONFIG_BS_HDR_ADDR_FLASH +/* BS_HDR_SIZE, BOOTSCRIPT_ADDR and BS_SIZE are not required */ +#endif #include <config_fsl_chain_trust.h> #endif /* #ifdef CONFIG_CHAIN_OF_TRUST */ |