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authorNishanth Menon <nm@ti.com>2013-05-30 03:19:31 (GMT)
committerTom Rini <trini@ti.com>2013-06-10 12:43:10 (GMT)
commit18c9d55ac611784d161440bb9f127e372e132856 (patch)
tree85e31364c96bdd69d1d582cf05d8b29da0d6cd84 /arch/arm/include/asm/omap_common.h
parent3332b244214d63dcf347fefb700fd71becb4b46e (diff)
downloadu-boot-18c9d55ac611784d161440bb9f127e372e132856.tar.xz
ARM: OMAP5: DRA7xx: support class 0 optimized voltages
DRA752 now uses AVS Class 0 voltages which are voltages in efuse. This means that we can now use the optimized voltages which are stored as mV values in efuse and program PMIC accordingly. This allows us to go with higher OPP as needed in the system without the need for implementing complex AVS logic. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Diffstat (limited to 'arch/arm/include/asm/omap_common.h')
-rw-r--r--arch/arm/include/asm/omap_common.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 3b8bece..f51fccc 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -506,9 +506,20 @@ struct pmic_data {
int (*pmic_write)(u8 sa, u8 reg_addr, u8 reg_data);
};
+/**
+ * struct volts_efuse_data - efuse definition for voltage
+ * @reg: register address for efuse
+ * @reg_bits: Number of bits in a register address, mandatory.
+ */
+struct volts_efuse_data {
+ u32 reg;
+ u8 reg_bits;
+};
+
struct volts {
u32 value;
u32 addr;
+ struct volts_efuse_data efuse;
struct pmic_data *pmic;
};