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author | Minghuan Lian <Minghuan.Lian@nxp.com> | 2016-12-13 06:54:22 (GMT) |
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committer | York Sun <york.sun@nxp.com> | 2017-01-18 17:27:07 (GMT) |
commit | 2acfda1292ecc1942cdcc4cae0e719ebdbd5d7d7 (patch) | |
tree | c7659e1287c3c9331ab2286cd44c09aeae722023 /arch/arm/include/asm | |
parent | 831b4e0cb6a752e7a0a7d2cfe3588e2862ab5e00 (diff) | |
download | u-boot-2acfda1292ecc1942cdcc4cae0e719ebdbd5d7d7.tar.xz |
armv8: ls2080a: Enable PCIe in defconfigs
The patch enables PCIe in ls2080a defconfigs and
removes unused PCIe related macro defines.
Signed-off-by: Minghuan Lian <Minghuan.Lian@nxp.com>
Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com>
Reviewed-by: York Sun <york.sun@nxp.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h | 8 |
1 files changed, 0 insertions, 8 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h index e18dcbd..f613efa 100644 --- a/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h +++ b/arch/arm/include/asm/arch-fsl-layerscape/immap_lsch3.h @@ -107,14 +107,6 @@ #define CONFIG_SYS_PCIE2_PHYS_ADDR 0x1200000000ULL #define CONFIG_SYS_PCIE3_PHYS_ADDR 0x1400000000ULL #define CONFIG_SYS_PCIE4_PHYS_ADDR 0x1600000000ULL -/* LUT registers */ -#define PCIE_LUT_BASE 0x80000 -#define PCIE_LUT_LCTRL0 0x7F8 -#define PCIE_LUT_DBG 0x7FC -#define PCIE_LUT_UDR(n) (0x800 + (n) * 8) -#define PCIE_LUT_LDR(n) (0x804 + (n) * 8) -#define PCIE_LUT_ENABLE (1 << 31) -#define PCIE_LUT_ENTRY_COUNT 32 /* Device Configuration */ #define DCFG_BASE 0x01e00000 |