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author | Lokesh Vutla <lokeshvutla@ti.com> | 2013-02-04 04:21:59 (GMT) |
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committer | Tom Rini <trini@ti.com> | 2013-03-11 15:06:09 (GMT) |
commit | 9ca8bfea80f38e3b423e339499c861ddc24b830c (patch) | |
tree | 5876730eda5da37b21a157f66233dc6d4a3b6757 /arch/arm/include/asm | |
parent | 60e6bdcc948f99e6b24d198c1b9136b0cb4e376b (diff) | |
download | u-boot-9ca8bfea80f38e3b423e339499c861ddc24b830c.tar.xz |
ARM: OMAP4+: emif: Detect SDRAM from SDRAM config register
Now SDRAM initialization is done on the basis of omap revision.
Instead this should be done on basis of SDRAM type read from
EMIF_SDRAM_CONFIG register. This will be helpful to avoid
unnessecary cpu checks for new boards
Signed-off-by: R Sricharan <r.sricharan@ti.com>
Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
Reviewed-by: Tom Rini <trini@ti.com>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r-- | arch/arm/include/asm/emif.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/include/asm/emif.h b/arch/arm/include/asm/emif.h index ed251ec..0824a80 100644 --- a/arch/arm/include/asm/emif.h +++ b/arch/arm/include/asm/emif.h @@ -1027,6 +1027,11 @@ extern const u32 ddr3_ext_phy_ctrl_const_base[EMIF_EXT_PHY_CTRL_CONST_REG]; #define MR8_IO_WIDTH_SHIFT 0x6 #define MR8_IO_WIDTH_MASK (0x3 << 0x6) +/* SDRAM TYPE */ +#define EMIF_SDRAM_TYPE_DDR2 0x2 +#define EMIF_SDRAM_TYPE_DDR3 0x3 +#define EMIF_SDRAM_TYPE_LPDDR2 0x4 + struct lpddr2_addressing { u8 num_banks; u8 t_REFI_us_x10; @@ -1156,4 +1161,5 @@ extern u32 *const emif_sizes; #endif void config_data_eye_leveling_samples(u32 emif_base); +u32 emif_sdram_type(void); #endif |