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authorKever Yang <kever.yang@rock-chips.com>2017-04-20 09:03:46 (GMT)
committerSimon Glass <sjg@chromium.org>2017-05-10 19:37:21 (GMT)
commitfa1392a236dfebbe938a48f124c8332759aba8e5 (patch)
tree20d3cfb0e657add5e6e97a1329249b9b884c1739 /arch/arm/include/asm
parent602778d3c7ea367bb55f73ec33e8ef8c2c1dcb12 (diff)
downloadu-boot-fa1392a236dfebbe938a48f124c8332759aba8e5.tar.xz
rockchip: reserve memory for rk3399 ATF data
There are 3 regions used by rk3399 ATF: - bl31 code, located at 0x10000; - cortex-m0 code and data, located at 0xff8c0000; - bl31 data, located at 0xff8c1000 ~ 0xff8c4000; SPL_TEXT_BASE starts from 0xff8c2000, we need to reserve memory for ATF data, or else there will be memory corrupt after SPL loads the ATF image. More detail about cortex-M0 code in ATF: https://github.com/ARM-software/arm-trusted-firmware/commit/ 8382e17c4c6bffd15119dfce1ee4372e3c1a7890 Signed-off-by: Kever Yang <kever.yang@rock-chips.com> Acked-by: Simon Glass <sjg@chromium.org>
Diffstat (limited to 'arch/arm/include/asm')
-rw-r--r--arch/arm/include/asm/arch-rockchip/boot0.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/arch-rockchip/boot0.h b/arch/arm/include/asm/arch-rockchip/boot0.h
index 8d7bc9a..7346876 100644
--- a/arch/arm/include/asm/arch-rockchip/boot0.h
+++ b/arch/arm/include/asm/arch-rockchip/boot0.h
@@ -16,3 +16,7 @@
.space 0x4 /* space for the 'RK33' */
#endif
b reset
+
+#if defined(CONFIG_ROCKCHIP_RK3399) && defined(CONFIG_SPL_BUILD)
+ .space CONFIG_ROCKCHIP_SPL_RESERVE_IRAM /* space for the ATF data */
+#endif