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authorTom Rini <trini@konsulko.com>2017-08-02 14:52:26 (GMT)
committerTom Rini <trini@konsulko.com>2017-08-02 14:52:26 (GMT)
commitec7483e34ea932fb68267dc0b1de30be51f271c9 (patch)
tree6120e2d0923962ec16cc757a22454bc942c90af4 /arch/arm/include
parent07d778382200a05a8b86cc135f79ec48e386f25a (diff)
parentec85721c8b94f9eb6807ebb15a223e4ec49a092a (diff)
downloadu-boot-ec7483e34ea932fb68267dc0b1de30be51f271c9.tar.xz
Merge git://git.denx.de/u-boot-fsl-qoriq
Signed-off-by: Tom Rini <trini@konsulko.com> Conflicts: include/configs/ls1046aqds.h include/configs/ls1046ardb.h
Diffstat (limited to 'arch/arm/include')
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/mp.h13
-rw-r--r--arch/arm/include/asm/arch-fsl-layerscape/soc.h4
2 files changed, 10 insertions, 7 deletions
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/mp.h b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
index fd3f851..88f40c0 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/mp.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/mp.h
@@ -13,7 +13,7 @@
* uint64_t entry_addr;
* uint64_t status;
* uint64_t lpid;
-* uint64_t os_arch;
+* uint64_t arch_comp;
* };
* we pad this struct to 64 bytes so each entry is in its own cacheline
* the actual spin table is an array of these structures
@@ -21,10 +21,16 @@
#define SPIN_TABLE_ELEM_ENTRY_ADDR_IDX 0
#define SPIN_TABLE_ELEM_STATUS_IDX 1
#define SPIN_TABLE_ELEM_LPID_IDX 2
-#define SPIN_TABLE_ELEM_OS_ARCH_IDX 3
+/* compare os arch and cpu arch */
+#define SPIN_TABLE_ELEM_ARCH_COMP_IDX 3
#define WORDS_PER_SPIN_TABLE_ENTRY 8 /* pad to 64 bytes */
#define SPIN_TABLE_ELEM_SIZE 64
+/* os arch is same as cpu arch */
+#define OS_ARCH_SAME 0
+/* os arch is different from cpu arch */
+#define OS_ARCH_DIFF 1
+
#define id_to_core(x) ((x & 3) | (x >> 6))
#ifndef __ASSEMBLY__
extern u64 __spin_table[];
@@ -43,7 +49,4 @@ int is_core_online(u64 cpu_id);
u32 cpu_pos_mask(void);
#endif
-#define IH_ARCH_ARM 2 /* ARM */
-#define IH_ARCH_ARM64 22 /* ARM64 */
-
#endif /* _FSL_LAYERSCAPE_MP_H */
diff --git a/arch/arm/include/asm/arch-fsl-layerscape/soc.h b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
index 497afe7..aeb1273 100644
--- a/arch/arm/include/asm/arch-fsl-layerscape/soc.h
+++ b/arch/arm/include/asm/arch-fsl-layerscape/soc.h
@@ -65,8 +65,8 @@ struct cpu_type {
#define SVR_LS2084A 0x870910
#define SVR_LS2048A 0x870920
#define SVR_LS2044A 0x870930
-#define SVR_LS2081A 0x870919
-#define SVR_LS2041A 0x870915
+#define SVR_LS2081A 0x870918
+#define SVR_LS2041A 0x870914
#define SVR_DEV_LS2080A 0x8701